Abstract: Techniques are disclosed herein for paging I/O translation table entries. A host bridge of system hardware receives a request to fetch a first segment of an I/O translation table associated with one of a plurality of logical partitions executing in a computing system. The host bridge identifies a control register associated with the first segment. Upon determining that the first segment is paged out to the storage volume, a second segment is paged out from a location in memory to the storage volume. The first segment is paged in to the location.

Abstract: Techniques are disclosed herein for paging I/O translation table entries. A host bridge of system hardware receives a request to fetch a first segment of an I/O translation table associated with one of a plurality of logical partitions executing in a computing system. The host bridge identifies a control register associated with the first segment. Upon determining that the first segment is paged out to the storage volume, a second segment is paged out from a location in memory to the storage volume. The first segment is paged in to the location.

Abstract: Techniques are disclosed herein for paging I/O translation table entries. A host bridge of system hardware receives a request to fetch a first segment of an I/O translation table associated with one of a plurality of logical partitions executing in a computing system. The host bridge identifies a control register associated with the first segment. The control register includes a time base and an indication of whether the first segment is paged out to a storage volume. Upon determining that the first segment is paged out to the storage volume, a second segment is paged out from a location in memory to the storage volume. The first segment is paged in to the location.

Abstract: An apparatus, program product and method in which a memory address space is allocated non-uniformly to IO resources in a memory mapped IO fabric based upon the locations of individual IO endpoints to which such IO resources are coupled. In a PCI-based environment, for example, PCI adapters are allocated memory address ranges in a PCI bus address space based upon the locations of the particular slots within which the PCI adapters are mounted.

Abstract: An apparatus, program product and method in which a memory address space is allocated non-uniformly to IO resources in a memory mapped IO fabric based upon the locations of individual IO endpoints to which such IO resources are coupled. In a PCI-based environment, for example, PCI adapters are allocated memory address ranges in a PCI bus address space based upon the locations of the particular slots within which the PCI adapters are mounted.