Patents by Inventor Trent O. Dudley

Trent O. Dudley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8946856
    Abstract: On-chip decoupling capacitors and methods for placing the same are disclosed in which designated spaces are created between the active circuits to insert designated capacitor cells. The designated capacitor cells may be placed in designated areas of the integrated circuit that are not simply spaces left empty by cell placement or frontier areas in or around the route, and the dimensions (e.g., height) of the designated capacitor cells may be selected to optimize (increase) capacitance efficiency. The capacitor cells may also be placed to target and reduce the interference between a digital core (aggressor) circuit and a victim analog circuit.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: February 3, 2015
    Assignee: Silicon Laboratories Inc.
    Inventors: Vitor M. Pereira, Trent O. Dudley, Jessica P. Davis
  • Publication number: 20140117497
    Abstract: On-chip decoupling capacitors and methods for placing the same are disclosed in which designated spaces are created between the active circuits to insert designated capacitor cells. The designated capacitor cells may be placed in designated areas of the integrated circuit that are not simply spaces left empty by cell placement or frontier areas in or around the route, and the dimensions (e.g., height) of the designated capacitor cells may be selected to optimize (increase) capacitance efficiency. The capacitor cells may also be placed to target and reduce the interference between a digital core (aggressor) circuit and a victim analog circuit.
    Type: Application
    Filed: October 30, 2012
    Publication date: May 1, 2014
    Applicant: SILICON LABORATORIES INC.
    Inventors: Vitor M. Pereira, Trent O. Dudley, Jessica P. Davis
  • Patent number: 6646822
    Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for canceling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: November 11, 2003
    Assignee: Cirrus Logic, Inc.
    Inventors: Tyson Tuttle, Diwakar Vishakhadatta, Jerrel P. Hein, David R. Welland, David E. Reed, Richard T. Behrens, William G. Bliss, Paul M. Romano, Trent O. Dudley, Christopher P. Zook
  • Patent number: 6208481
    Abstract: A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: March 27, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Mark S. Spurbeck, Li Du, Trent O. Dudley, William G. Bliss, German S. Feyh, Richard T. Behrens
  • Patent number: 6108151
    Abstract: A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated binary sequence from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read head positioned over the disk storage medium. The read channel comprises a sampling device, such as an analog-to-digital converter (A/D), for sampling the analog read signal to generate the discrete time sample values and for sampling at least one other auxillary analog input signal, such as a servo control signal. In this manner, performance characteristics of the read channel can be measured, such as the driving current applied to the servo control voice coil motor (VCM), without requiring additional hardware.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: August 22, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: Tyson Tuttle, Diwakar Vishakhadatta, Jerrel P. Hein, David R. Welland, David E. Reed, Richard T. Behrens, William G. Bliss, Paul M. Romano, Trent O. Dudley, Christopher P. Zook
  • Patent number: 5999355
    Abstract: A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: December 7, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, William G. Bliss, Li Du, Mark S. Spurbeck, German S. Feyh, Trent O. Dudley
  • Patent number: 5991107
    Abstract: A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, computes a DC offset in the sample values in real time, and subtracts the DC offset from the read signal. This attenuates the deleterious affect a DC offset has on the detection algorithm used to detect the recorded data, such as the Viterbi detection algorithm.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: November 23, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Trent O. Dudley, Neal Glover, David R. Welland
  • Patent number: 5909331
    Abstract: A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector. The read channel further employs an error tolerant sync mark detector, as well as a sync mark recovery procedure for synchronizing to the data when the sync mark is destroyed by a defect.
    Type: Grant
    Filed: March 19, 1997
    Date of Patent: June 1, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Trent O. Dudley, Neal Glover
  • Patent number: 5903857
    Abstract: A method and apparatus for calibrating an analog equalizer in a sampled amplitude read channel is disclosed wherein the filter's frequency response is measured and calibrated directly. This is accomplished by injecting a known periodic signal into the analog filter and measuring a spectrum value at a predetermined frequency. The filter parameters are adjusted accordingly until the spectrum reaches a predetermined target value. In the preferred embodiment, the analog filter comprises at least one second order low pass filter (referred to as a biquad filter), and the filter's spectrum is adjusted relative to the well known parameters f.sub.o and Q. Specifically, the parameters f.sub.o and Q are optimized relative to a power measurement at predetermined harmonics of the input signal. In this manner, the present invention enables auto-calibration of the analog equalizer without reading any data from the disc.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: May 11, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Tyson Tuttle, Kent D. Anderson, Trent O. Dudley, William G. Bliss
  • Patent number: 5892632
    Abstract: A sampled amplitude read channel is disclosed for disk storage systems which asynchronously samples an analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector. To increase the speed of the read channel, the FIR filters in the equalizer and interpolator are implemented according to a residue number system. Further, the residue number system implementation of the FIR filters uses "one-hot" encoding to decrease power dissipation.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: April 6, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, David R. Welland, Trent O. Dudley, Mark S. Spurbeck
  • Patent number: 5796535
    Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded in concentric tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The sampled amplitude read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for cancelling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: August 18, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Tyson Tuttle, Diwakar Vishakhadatta, Jerrel P. Hein, David R. Welland, David E. Reed, Richard T. Behrens, William G. Bliss, Paul M. Romano, Trent O. Dudley, Christopher P. Zook
  • Patent number: 5729396
    Abstract: A sampled amplitude read channel reads data from a magnetic medium by detecting digital data from a sequence of discrete time sample values generated by sampling an analog read signal from a read head positioned over the magnetic medium. The digital data comprises a preamble field followed by a sync mark followed by a data field. Timing recovery in the read channel synchronizes to a phase and frequency of the preamble field and a sync detector detects the sync mark in order to frame operation of an RLL decoder for decoding the detected data field. To decrease the probability of early misdetection, the sync mark is chosen to have minimum correlation with shifted versions of the sync mark concatenated with the preamble field. To further increase the fault tolerance, the sync mark detector is enabled by timing recovery relative to the end of the preamble field.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: March 17, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Trent O. Dudley, Richard T. Behrens, Christopher P. Zook
  • Patent number: 5623377
    Abstract: A filter for compensating discrete secondary pulse formations associated with a data stream of discrete main pulses produced from data read from magnetic media. The filter's impulse response comprises a center coefficient with side compensating coefficients for attenuating the secondary pulses when the input signal is convolved with the impulse response. The magnitude and delay of the compensation coefficients are programmable and are adaptively adjusted to optimize the impulse response for a given environment. In a traditional FIR embodiment, two delay lines are used to generate the two programmable delays between the center coefficient and side compensation coefficients. In the preferred embodiment, an IIR filter provides the two programmable delays using only one delay line thereby reducing the size and cost of the circuit. Also in the preferred embodiment, the data stream is interleaved into an even and odd data stream and processed in parallel by two filters in order to double the throughput.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: April 22, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Neal Glover, Trent O. Dudley, Alan J. Armstrong, Christopher P. Zook, William G. Bliss
  • Patent number: 5583706
    Abstract: In a sampled amplitude read channel for magnetic recording, a nonlinear discrete time decimation filter in a negative feed back loop adjusts a DC offset in an analog read signal from a magnetic read head without distorting the read signal. In sampled amplitude recording, adding the samples of an isolated positive pulse to the samples of an isolated negative pulse generates the DC offset of the discrete time sample values. A decimation filter adds the sample values from a positive pulse to the sample values of a negative pulse in order to detect and pass the DC offset in the read signal. The detected discrete time DC offset from the discrete time decimation filter is converted into an analog DC offset signal and subtracted from the analog read signal in a negative feedback loop. A running average decimation filter removes the DC offset during acquisition, and a decision-directed decimation filter removes the DC offset during tracking.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: December 10, 1996
    Assignee: Cirrus Logic, Inc.
    Inventors: Trent O. Dudley, William G. Gliss, Richard T. Behems, David R. Welland
  • Patent number: 5268908
    Abstract: The low-data-delay triple-coverage code for on-the-fly error correction apparatus allows on-the-fly error correction with fewer redundancy bytes than needed for a non-overlaid data redundancy structure thereby producing corrected data with a low data delay. The present apparatus divides a received block of data into a plurality of fixed size sub-blocks with the last sub-block size being smaller than or equal to the fixed sub-block size. Three predefined error correcting code generator polynomials are used to accumulate redundancy values for the sub-blocks. At the end of each sub-block one of the three pre-defined error correcting code generator polynomials will have accumulated a redundancy value across the present sub-block data and the previous two sub-blocks of data and redundancy. After the accumulated redundancy has been output as write data the predefined error correcting code generator polynomial is reset.
    Type: Grant
    Filed: June 19, 1991
    Date of Patent: December 7, 1993
    Assignee: Storage Technology Corporation
    Inventors: Neal Glover, David R. Hieb, Trent O. Dudley, Dennis L. Baker