Patents by Inventor Trevis Chandler
Trevis Chandler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11256503Abstract: A processing device includes an array of processing elements, each processing element including an arithmetic logic unit to perform an operation. The processing device further includes interconnections among the array of processing elements to provide direct communication among neighboring processing elements of the array of processing elements. A processing element of the array of processing elements may be connected to a first neighbor processing element that is immediately adjacent the processing element. The processing element may be further connected to a second neighbor processing element that is immediately adjacent the first neighbor processing element. A processing element of the array of processing elements may be connected to a neighbor processing element via an input selector to selectively take output of the neighbor processing element as input to the processing element. A computing device may include such processing devices in an arrangement of banks.Type: GrantFiled: March 11, 2020Date of Patent: February 22, 2022Assignee: UNTETHER AI CORPORATIONInventors: Trevis Chandler, William Martin Snelgrove, Darrick John Wiebe
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Publication number: 20200293316Abstract: A processing device includes an array of processing elements, each processing element including an arithmetic logic unit to perform an operation. The processing device further includes interconnections among the array of processing elements to provide direct communication among neighboring processing elements of the array of processing elements. A processing element of the array of processing elements may be connected to a first neighbor processing element that is immediately adjacent the processing element. The processing element may be further connected to a second neighbor processing element that is immediately adjacent the first neighbor processing element. A processing element of the array of processing elements may be connected to a neighbor processing element via an input selector to selectively take output of the neighbor processing element as input to the processing element. A computing device may include such processing devices in an arrangement of banks.Type: ApplicationFiled: March 11, 2020Publication date: September 17, 2020Inventors: Trevis CHANDLER, Pasquale LEONE, William Martin SNELGROVE, Darrick John WIEBE
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Patent number: 10354706Abstract: For an integrated circuit (IC) that is designed to execute user defined operations after initialization, a sequencing circuitry in the IC that delays the start of the user design execution until a set of initial condition has been computed and propagated is provided. The sequencing holds the first group of circuits at an initial state while a second group of circuits computes and propagates a set of initial conditions based at least partly on the initial state of the first group of circuits. The circuits in the first group when being held disregard their inputs and do not change their outputs. The first group of circuits is released from its initial state after the second group of circuits has completed computation and propagation of the set of initial conditions. The circuits in the first group when released are freed to store or clock-in new inputs and produce new outputs in order to perform the user defined operations in conjunction with the second group of circuits.Type: GrantFiled: November 23, 2015Date of Patent: July 16, 2019Assignee: Altera CorporationInventors: Christopher D. Ebeling, Trevis Chandler
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Patent number: 10340920Abstract: The present disclosure relates generally to techniques for enhancing adders implemented on an integrated circuit. In particular, arithmetic performed by an adder implemented to receive operands having a first precision may be restructured so that a set of sub-adders may perform the arithmetic on a respective segment of the operands. More specifically, the adder may be restructured so that a sub-adder of the set of sub-adders may concurrently output a generate signal and a propagate signal, which may both be routed to a prefix network. The prefix network may determine respective carry bit(s), which may carry into and/or select a sum at a subsequent sub-adder of the restructured adder. As a result, the integrated circuit may benefit from increased efficiencies, reduced latency, and reduced resource consumption (e.g., area and/or power) involved with implementing addition, which may improve operations such as encryption or machine learning on the integrated circuit.Type: GrantFiled: September 28, 2018Date of Patent: July 2, 2019Assignee: INTEL CORPORATIONInventors: Martin Langhammer, Tim Michael Vanderhoek, Jeffery Christopher Chromczak, Trevis Chandler
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Patent number: 9940995Abstract: A programmable integrated circuit may include configuration random-access memory (CRAM) cells and lookup table random-access memory (LUTRAM) cells. The programmable integrated circuit may include a CRAM column and at least two LUTRAM columns, a first portion of which is operable as LUTRAM cells and a second portion of which is reused as CRAM cells. Each of the memory cells have a configuration write port and a read port. The configuration write ports of the first portion may be gated, whereas the configuration write ports of the second portion lack gating logic. The read port of the memory cells in the LUTRAM columns may be masked only when the first portion of cells are operated in RAM mode and are currently being accessed.Type: GrantFiled: January 31, 2017Date of Patent: April 10, 2018Assignee: Intel CorporationInventors: Trevis Chandler, Jung Ko, Kenneth Duong, Dipak Sikdar
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Patent number: 9276572Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: January 19, 2015Date of Patent: March 1, 2016Assignee: Altera CorporationInventors: Martin Voogel, Jason Redgrave, Trevis Chandler
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Patent number: 9203397Abstract: For an integrated circuit (IC) that is designed to execute user defined operations after initialization, a sequencing circuitry in the IC that delays the start of the user design execution until a set of initial condition has been computed and propagated is provided. The sequencing holds the first group of circuits at an initial state while a second group of circuits computes and propagates a set of initial conditions based at least partly on the initial state of the first group of circuits. The circuits in the first group when being held disregard their inputs and do not change their outputs. The first group of circuits is released from its initial state after the second group of circuits has completed computation and propagation of the set of initial conditions. The circuits in the first group when released are freed to store or clock-in new inputs and produce new outputs in order to perform the user defined operations in conjunction with the second group of circuits.Type: GrantFiled: December 15, 2012Date of Patent: December 1, 2015Assignee: Altera CorporationInventors: Christopher D. Ebeling, Trevis Chandler
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Patent number: 9154134Abstract: Some embodiments provide a configurable integrated circuit (IC) having a routing fabric that includes configurable storage element in its routing fabric. In some embodiments, the configurable storage element includes a parallel distributed path for configurably providing a pair of transparent storage elements. The pair of configurable storage elements can configurably act either as non-transparent (i.e., clocked) storage elements or transparent configurable storage elements. In some embodiments, the configurable storage element in the routing fabric performs both routing and storage operations by a parallel distributed path that includes a clocked storage element and a bypass connection. In some embodiments, the configurable storage element perform both routing and storage operations by a pair of master-slave latches but without a bypass connection.Type: GrantFiled: May 19, 2014Date of Patent: October 6, 2015Assignee: Altera CorporationInventors: Martin Voogel, Steven Teig, Thomas S. Chanack, Andrew Caldwell, Jung Ko, Trevis Chandler
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Publication number: 20150207504Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: ApplicationFiled: January 19, 2015Publication date: July 23, 2015Inventors: Martin Voogel, Jason Redgrave, Trevis Chandler
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Patent number: 8970250Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: November 1, 2012Date of Patent: March 3, 2015Assignee: Tabula, Inc.Inventors: Martin Voogel, Jason Redgrave, Trevis Chandler
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Patent number: 8941409Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a configurable routing fabric for configurably routing signals among configurable logic circuits. The configurable routing fabric includes a particular wiring path that connects an output of a source circuit to inputs of a destination circuit. The particular wiring path includes a first path and a second path that is parallel to the first path. The first and second paths are for configurably storing output signals of the source circuit. The first path connects to a first input of the destination circuit and the second path connects to a second input of the destination path.Type: GrantFiled: July 2, 2012Date of Patent: January 27, 2015Assignee: Tabula, Inc.Inventors: Martin Voogel, Steven Teig, Trevis Chandler
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Patent number: 8901956Abstract: An IC with configuration context switchers is provided. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: November 16, 2012Date of Patent: December 2, 2014Assignee: Tabula, Inc.Inventors: Trevis Chandler, Jason Redgrave, Martin Voogel
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Publication number: 20140333345Abstract: Some embodiments provide a configurable integrated circuit (IC) having a routing fabric that includes configurable storage element in its routing fabric. In some embodiments, the configurable storage element includes a parallel distributed path for configurably providing a pair of transparent storage elements. The pair of configurable storage elements can configurably act either as non-transparent (i.e., clocked) storage elements or transparent configurable storage elements. In some embodiments, the configurable storage element in the routing fabric performs both routing and storage operations by a parallel distributed path that includes a clocked storage element and a bypass connection. In some embodiments, the configurable storage element perform both routing and storage operations by a pair of master-slave latches but without a bypass connection.Type: ApplicationFiled: May 19, 2014Publication date: November 13, 2014Applicant: Tabula, Inc.Inventors: Martin Voogel, Steven Teig, Thomas S. Chanack, Andrew Caldwell, Jung Ko, Trevis Chandler
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Patent number: 8760193Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of the configurable logic circuits and multiple configuration retrieval circuits for providing configuration bits to the row of configurable logic circuits. The IC also includes a row configuration controller for forcing the multiple configuration retrieval circuits to output a particular configuration value based on a user signal that is received at runtime.Type: GrantFiled: July 2, 2012Date of Patent: June 24, 2014Assignee: Tabula, Inc.Inventors: Martin Voogel, Steven Teig, Thomas S. Chanack, Andrew Caldwell, Jung Ko, Trevis Chandler
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Patent number: 8598907Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: January 27, 2012Date of Patent: December 3, 2013Assignee: Tabula, Inc.Inventors: Trevis Chandler, Joe Entjer, Martin Voogel, Jason Redgrave
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Publication number: 20130093460Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of the configurable logic circuits and multiple configuration retrieval circuits for providing configuration bits to the row of configurable logic circuits. The IC also includes a row configuration controller for forcing the multiple configuration retrieval circuits to output a particular configuration value based on a user signal that is received at runtime.Type: ApplicationFiled: July 2, 2012Publication date: April 18, 2013Inventors: Martin Voogel, Steven Teig, Thomas S. Chanack, Andrew Caldwell, Jung Ko, Trevis Chandler
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Publication number: 20130093461Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a configurable routing fabric for configurably routing signals among configurable logic circuits. The configurable routing fabric includes a particular wiring path that connects an output of a source circuit to inputs of a destination circuit. The particular wiring path includes a first path and a second path that is parallel to the first path. The first and second paths are for configurably storing output signals of the source circuit. The first path connects to a first input of the destination circuit and the second path connects to a second input of the destination path.Type: ApplicationFiled: July 2, 2012Publication date: April 18, 2013Inventors: Martin Voogel, Steven Teig, Trevis Chandler
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Patent number: 8344755Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: September 8, 2008Date of Patent: January 1, 2013Assignee: Tabula, Inc.Inventors: Trevis Chandler, Jason Redgrave, Martin Voogel
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Patent number: 8324931Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: April 18, 2011Date of Patent: December 4, 2012Assignee: Tabula, Inc.Inventors: Martin Voogel, Jason Redgrave, Trevis Chandler
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Patent number: 8248101Abstract: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.Type: GrantFiled: September 8, 2008Date of Patent: August 21, 2012Assignee: Tabula, Inc.Inventors: Martin Voogel, Jason Redgrave, Trevis Chandler