Abstract: An integrated circuit has first and second complementary MOSFETs and first and second complementary MESFETs fabricated on a common substrate. An insulating layer is disposed on the common substrate. The active region uses salicide block oxide layers to align the drain and source regions to the gate. Alternatively, the active region uses poly-silicon separators surrounded by side wall oxide spacers to align the drain and source regions to the gate. The MESFET may have a drift region between the gate terminal and drain region for high voltage applications.

Abstract: Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.

Abstract: Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.

Abstract: Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.

Abstract: Various emdodiments include a transistor device that is controlled by a gate current and that exhibits low power consumption as well as high speed characteristics. In various embodiments, an enhancement mode MESFET device exhibits channel drain current that is controlled by the application of bias current into the gate. Complementary n- and p-channel devices can be realized for, for example, micropower analog and digital circuit applications.

Abstract: Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.