Patents by Inventor Trevor Jones

Trevor Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020187185
    Abstract: The use of a protein of vegetable origin suitable in capsule or microcapsule manufacture, which protein
    Type: Application
    Filed: May 9, 2002
    Publication date: December 12, 2002
    Inventor: Roger Trevor Jones
  • Patent number: 6445708
    Abstract: The present ATM switch includes a plurality of controllers, each of which contains a plurality of cell buffers to store cells for each VC. A plurality of arbitration buffers store pointers, on a VC priority level basis, to order the processing of cell transmissions. The arbitration buffers are processed in priority order, with an interrupt being generated by a timer associated with each arbitration buffer, other than the highest priority arbitration buffer, to ensure that each arbitration buffer is periodically processed.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: September 3, 2002
    Assignee: Ahead Communications Systems, Inc.
    Inventor: Trevor Jones
  • Patent number: 6327246
    Abstract: An ATM switch (10) has a plurality of link controllers (12) each having a FIFO (30) for each VC established, a FIFO (32) for each priority level, and a traffic shaping FIFO (34) for pointers to ABR cells. Cells are pushed into the VC FIFO (30) and a pointer to the VC FIFO (30) is pushed into an arbitration FIFO (32) for the priority level of the VC FIFO (30). Pointers to ABR cells with onward transmission times are pushed into the traffic shaping FIFO (34). The arbitration FIFOs (32) are examined according to a schedule and cells are popped from VC FIFOs (30) according to priority for exit from the controller (12). A leaky bucket processor (22) calculates an average output cell rate OCR and ABR cells are popped from VC FIFOs out of turn if the MCR for the ABR VC exceed the OCR.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: December 4, 2001
    Assignee: Ahead Communications Systems, Inc.
    Inventor: Trevor Jones
  • Patent number: 6253807
    Abstract: A fully automatic apparatus and process for aliquotting liquid samples from a sample container is provided which includes the steps of creating an opening in the sample container, transferring an aliquot of the sample liquid into an aliquot tube, sealing the container and conveying the aliquot tube to a location for conducting the desired tests on the sample aliquot.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: July 3, 2001
    Assignee: CRS Robotics Corporation
    Inventor: Trevor Jones
  • Patent number: 6122253
    Abstract: An ATM network switch (11) including a buffer (24) for buffering the flow of ATM cells and a congestion control mechanism (23). The congestion control mechanism establishes a value Max, representing the maximum permissible number of ATM cells which may be stored in the buffer. The switch includes a predetermined offset value K for determining the maximum occupancy of the buffer for the connection. The congestion control mechanism determines the total number of cells TSC currently stored in the buffer and the number of cells VcCnt stored for a given connection, determines the remaining capacity BS of the buffer, calculates an adjusted value of Max as a function of TSC and BS, compares the adjusted value Max' with VcCnt, and discards the cell if VcCnt is greater than the adjusted value.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: September 19, 2000
    Assignee: General Data Comm Inc.
    Inventor: Trevor Jones
  • Patent number: 6115358
    Abstract: A method of controlling flow of ATM cells by signalling to the source of cells on a connection to reduce transmission rate when congestion occurs in a switch in an ATM network. The step of signalling being carried out by way of inserting into the Resource Management cells a new Explicit rate (ER) value for the connection at a given point in the network. The ER value being obtained is a function of the number of Available Bit Rate (ABR) cells output from the buffer in an interval. The method includes determining the number of ABR Virtual Containers (VCs) with more than a predetermined number of cells stored, determining the number of cells on the connection stored, determining the total number of cells currently stored and the remaining capacity of the buffer, and calculating the ER value from a given formula.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: September 5, 2000
    Assignee: General Data Comm, Inc.
    Inventor: Trevor Jones
  • Patent number: 6067286
    Abstract: An ATM data network switch having two separate but simultaneously active switch fabrics and a plurality of slot controllers is disclosed. Each slot controller has at least one external data link thereto and is separately connected to the two separate switch fabrics. Each switch fabric was the ability to switch a data cell transmitted from any one of the slot controllers to any of the other slot controllers. Each slot controller is arranged to determine the availability of the data paths to all the other slot controllers through both switch fabrics and to select for each cell to be switched a data path through one or the other of the switch fabric according to the availability determined.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: May 23, 2000
    Assignee: General DataComm, Inc.
    Inventors: Trevor Jones, Richard Barnett
  • Patent number: 6044060
    Abstract: An ATM network switch includes a switch fabric (14), and a plurality of slot controllers (11) coupled to the switch fabric. Each slot controller has at least one external data link (12, 13), cell receiving circuitry (21) for receiving ATM cells from the data link and cell transmitting circuitry (22) for transmitting ATM cells outwardly on the data link. The cell transmitting circuitry of each slot controller includes traffic shaping circuitry (23) arranged to set, for each cell presented to the transmitting circuitry, a current onward transmission time where onward transmission at the input rate meets a predetermined flow rate criterion, and a delayed onward transmission time where onward transmission at the current time would cause the traffic on a VC to exceed a predetermined flow rate criterion.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: March 28, 2000
    Assignee: General DataComm
    Inventor: Trevor Jones
  • Patent number: 5960014
    Abstract: A thin film resistor for optoelectronic integrated circuits is described. A stable low resistance, thin film resistor comprising a bilayer of platinum on titanium is provided. Advantageously, the resistive layer is protected by a layer of dielectric, e.g. silicon dioxide or silicon nitride to reduce degradation from humidity an under high temperature operation at 300.degree. C. or more. The resistor may be formed on various substrates, including silicon dioxide, silicon nitride and semiconductor substrates. Applications for optoelectronic integrated circuits include integrated resistive heaters for wavelength fine tuning of a semiconductor laser array.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: September 28, 1999
    Assignee: Northern Telecom Limited
    Inventors: Guo Ping Li, Agnes Margittai, Trevor Jones, Joannie Marks, Frank R. Shepherd
  • Patent number: 5841773
    Abstract: An ATM network switch is provided with a switch fabric linking a plurality of slot controllers. Each slot controller receives ATM cells from an external data link and has at least one input port to the switch fabric. The switch fabric switches a data cell received from any one port to one or more other ports. Each slot controller is provided with a separate group of buffers for each slot controller in the switch, and stores ATM cells intended for those other slot controller in the buffers. Each group of buffers includes a separate buffer for each class of cell traffic, so that the ATM cells are stored by intended slot controller and by class. The slot controller also includes a buffer control circuit which controls the passing of cells from the buffer to the switch fabric. The switch fabric includes input FIFOs, an indication of the fullness of which is measured and signaled back to the buffer control circuit.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: November 24, 1998
    Assignee: General DataComm, Inc.
    Inventor: Trevor Jones
  • Patent number: 5796956
    Abstract: An ATM cell switch includes a plurality of link controllers, each of which has a leaky bucket processor to monitor and control cell flow rates. Each of the leaky bucket processors includes a pair of buckets. Each processor times the arrival of each ATM cell in the respective link controller, calculates the time interval between the reception of two consecutive cells on the same connection, simultaneously determines the resultant level in both of the buckets from the calculated time interval and a stored predetermined regular bucket increment, compares the resultant level with a predetermined maximum level, and discards or changes the CLP of the current cell if the resultant level exceeds the predetermined maximum. According to a preferred embodiment of the invention, timing is effected with a 32-bit timer, but only the least significant 16-bits are used to time stamp cells.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: August 18, 1998
    Assignee: General DataComm Advanced Research Centre limited
    Inventor: Trevor Jones
  • Patent number: 5679819
    Abstract: A copolymer comprising cystine, or a derivative thereof, bonded to a silicon-containing group, wherein the silicon containing group is bonded to one or more other silicon-containing groups by siloxane groups. This polymer is useful for treating keratin-containing substrates.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: October 21, 1997
    Assignee: Croda International PLC
    Inventors: Roger Trevor Jones, Surinder Pall Chahal
  • Patent number: 4916927
    Abstract: Relative movement of members (10,11) of a lock is normally obstructed by an element (14) which can be moved by a solenoid (18) entirely into a recess in one of the members so that the one (11) and the obstructing element (14) can turn together relative to the other member (10) and solenoid. The arrangement may be used to prevent turning of a key-receiving member relative to a housing or as a clutch between two members mounted rotatably in a housing.
    Type: Grant
    Filed: November 21, 1988
    Date of Patent: April 17, 1990
    Inventors: John O'Connell, Roy S. Jefferies, Hugh Trevor-Jones
  • Patent number: 4854146
    Abstract: Relative movement of members (10,11) of a lock is normally obstructed by an element (14) which can be moved by a solenoid (18) entirely into a recess in one of the members so that the one (11) and the obstructing element (14) can turn together relative to the other member (10) and solenoid. The arrangement may be used to prevent turning of a key-receiving member relative to a housing or as a clutch between two members mounted rotatably in a housing.
    Type: Grant
    Filed: July 31, 1987
    Date of Patent: August 8, 1989
    Assignee: Lowe and Fletcher Limited
    Inventors: John O'Connell, Roy S. Jefferies, Hugh Trevor-Jones
  • Patent number: 4791280
    Abstract: A lock has means (15,16) for reading from a key (11) a binary encoded number. If the number read from the key is a predetermined number, the lock will store in a memory (19) a further number read from a further key applied immediately after withdrawal of the first key. The device will then recognize the second key, when applied subsequently.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: December 13, 1988
    Assignee: Lowe and Fletcher Limited
    Inventors: John O'Connell, Alan Webster, Roy S. Jefferies, Hugh Trevor-Jones