Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.

Abstract: Techniques for improving the performance of a quantum processor are described. Some techniques employ reducing intrinsic/control errors by using quantum processor-wide problems specifically crafted to reveal errors so that corrections may be applied. Corrections may be applied to physical qubits, logical qubits, and couplers so that problems may be solved using quantum processors with greater accuracy.

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton.

Abstract: Fabricating wiring layers above a Josephson junction multi-layer may include removing a part of the multilayer; depositing an insulating layer to overlie a part of the multilayer; and patterning the insulating layer to define a hole in the insulating layer. The method includes depositing a first superconducting wiring layer over a part of the insulating layer and within a portion of the hole. Further, insulating and wiring layers may be deposited and a topmost wiring layer defined. The method includes depositing a passivating layer to overlie the topmost wiring layer. Fabricating a superconducting integrated circuit comprising a hybrid dielectric system may include depositing a high-quality dielectric layer that overlies a superconducting feature. The method includes depositing a second dielectric layer that overlies at least part of the high-quality dielectric layer. The second dielectric layer can comprise a conventional dielectric material.

Abstract: A hybrid computer for generating samples employs a digital computer operable to perform post-processing. An analog computer may be communicatively coupled to the digital computer. The analog computer may be operable to return one or more samples corresponding to low-energy configurations of a Hamiltonian. Methods of generating samples from a quantum Boltzmann distribution to train a Quantum Boltzmann Machine, and from a classical Boltzmann distribution to train a Restricted Boltzmann Machine, are also taught. Computational systems and methods permit processing problems having size and/or connectivity greater than, and/or at least not fully provided by, a working graph of an analog processor.

Abstract: Passive and actives approaches to mitigating the effects of spin-bath polarization are described and illustrated. Such may, for example, include at least partially depolarizing the spin-bath polarization, for instance by: performing an annealing cycle by the quantum processor to generate a final state of a qubit of the quantum processor; flipping the final state of the qubit of the quantum processor to an opposite state; and latching the qubit in the opposite state for a predetermined duration.

Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton.

Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.

Abstract: A topology or hardware graph of a quantum processor is modifiable, for example prior to embedding of a problem, for instance by creating chains of qubits, where each chain which operates as a single or logical qubit to impose a logical graph on the quantum processor. A user interface (UI) allows a user to select a topology suited for embedding a particular problem or type of problem, to supply parameters that define the desired topology, or to supply or specify a problem graph or problem definition from which a processor-based system determines or selects an appropriate topology or logical graph to impose. Topologies may have regularity and/or self-similarity over the quantum processor or portions thereof, which portions may constitute unit cells. Logical graphs imposed on the quantum processor may take the form of a hypercube graph. A UI allows the user to specify a desired dimension of the hypercube graph.

Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.

Abstract: Fabricating wiring layers above a Josephson junction multi-layer may include removing a part of the multilayer; depositing an insulating layer to overlie a part of the multilayer; and patterning the insulating layer to define a hole in the insulating layer. The method includes depositing a first superconducting wiring layer over a part of the insulating layer and within a portion of the hole. Further, insulating and wiring layers may be deposited and a topmost wiring layer defined. The method includes depositing a passivating layer to overlie the topmost wiring layer. Fabricating a superconducting integrated circuit comprising a hybrid dielectric system may include depositing a high-quality dielectric layer that overlies a superconducting feature. The method includes depositing a second dielectric layer that overlies at least part of the high-quality dielectric layer. The second dielectric layer can comprise a conventional dielectric material.

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton.

Abstract: Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.

Abstract: Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.

Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

Abstract: Techniques for improving the performance of a quantum processor are described. Some techniques employ reducing intrinsic/control errors by using quantum processor-wide problems specifically crafted to reveal errors so that corrections may be applied. Corrections may be applied to physical qubits, logical qubits, and couplers so that problems may be solved using quantum processors with greater accuracy.

Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.