Abstract: A method of coordinating access to a data buffer including a plurality of data blocks, using a buffer list with a plurality of entries corresponding to the data blocks. Each buffer list entry includes: (i) a status code for indicating the status of data in the corresponding data block, and (ii) a partial address common to both the next buffer list entry and a data block corresponding to said next buffer list entry. A status code is selected from a cyclical set of sequential status codes having a period of N, the status codes sequentially, and alternately, representing the most recent history of a data block, including: (i) full status, indicating data in the data block has been retrieved from the storage device or is to be stored to the storage device, or (ii) empty status, indicating data transferred out of the data block to a host or to the storage device. A store flag maintains a status code representing empty status, and a retrieve flag maintains a status code representing full status.

Abstract: A disk drive having error detection and correction capability includes a dedicated finite field processor for performing corrections and for generating software syndromes for miscorrection detection. The processor operates over a finite field under program control and performs parallel finite field multiplication and addition operations in a single execution cycle.

Abstract: An intelligent disk drive employing a controller which performs high speed error correction and miscorrection detection using a finite field processor. The error correction code is defined over a finite field and the error detection code is defined over an extension field of the finite field. The finite field processor performs calculation over both the finite field and extension field to provide high speed error correction and correction validation.

Abstract: An intelligent disk drive having error detection and correction capability employs an embedded error correction controller with a pipelined architecture for performing error correction under program control. The pipelined architecture provides parallel operand fetching and instruction execution for high speed operations during error correction.

Abstract: An intelligent disk drive includes a controller which embeds user data address information into error correction code check symbols written to the data storage disk. The address information is not written to disk, but address errors are detected by decoding the error correction code check symbols during read operations. Disk space is saved while maintaining robust address error detection.