Patents by Inventor Trishul M. Chilimbi

Trishul M. Chilimbi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7657876
    Abstract: A system and method for determining where bottlenecks in a program's data accesses occur and providing information to a software developer as to why the bottlenecks occur and what may be done to correct them. A stream of data access references is analyzed to determine data access patterns (also called data access sequences). The stream is analyzed to find frequently repeated data access sequences (called hot data streams). Properties of the hot data streams are calculated and upon selection of a hot data stream are displayed in a development tool that associates lines of code with the hot data streams.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: February 2, 2010
    Assignee: Microsoft Corporation
    Inventor: Trishul M. Chilimbi
  • Publication number: 20080301717
    Abstract: A memory footprint interface visibly displays one or more memory footprints of an application program during a selected time interval. In one implementation, the memory footprint interface receives one or more application program address traces, which include data regarding minimum and maximum memory addresses that are being accessed during execution of the program in the selected time interval. The memory footprint interface can animate playback of memory address reference with various timed fadeout, so as to indicate memory reuse or working set size. The memory footprint interface can also then provide a number of visible indicia for the corresponding memory access patterns over the particular time interval. The visible indicia can be used to color code a wide range of data items displayed through the memory footprint interface, so as to differentiate such things as read and/or write access requests, frequency, threads, and so forth.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 4, 2008
    Applicant: MICROSOFT CORPORATION
    Inventors: Trishul A. M. Chilimbi, George G. Robertson
  • Patent number: 6971092
    Abstract: A system and method for analyzing data accesses to determine data access patterns. Data address accesses are traced and transformed into Whole Program Streams (WPS). WPS may then be used to discover higher-level data abstractions, such as hot data streams and data flow graphs. Hot data streams provide information related to sequences of data addresses that are repeatedly accessed together. Data flow graphs indicate how hot data streams are related and include frequencies of each hot data stream following another. Hot data streams and data flow graphs may be used with pre-fetching and/or cache managers to improve program performance.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: November 29, 2005
    Assignee: Microsoft Corporation
    Inventor: Trishul M. Chilimbi
  • Patent number: 6934942
    Abstract: A system and method for determining where bottlenecks in a program's data accesses occur and providing information to a software developer as to why the bottlenecks occur and what may be done to correct them. A stream of data access references is analyzed to determine data access patterns (also called data access sequences). The stream is analyzed to find frequently repeated data access sequences (called hot data streams). Properties of the hot data streams are calculated and upon selection of a hot data stream are displayed in a development tool that associates lines of code with the hot data streams.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: August 23, 2005
    Assignee: Microsoft Corporation
    Inventor: Trishul M. Chilimbi
  • Patent number: 6360361
    Abstract: Fields which are individually addressable data elements in data structures are reordered to improve the efficiency of cache line access. Temporal data regarding the referencing of such fields is obtained, and a tool is used to construct a field affinity graph of temporal access affinities between the fields. Nodes in the graph represent fields, and edges between the nodes are weighted to indicate field affinity. A first pass greedy algorithm attempts to combine high affinity fields in the same cache line or block. Constraints are used to reject invalid combinations of fields. The constraints may be provided by program analysis, programmer, or actual dynamically generated.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: March 19, 2002
    Assignee: Microsoft Corporation
    Inventors: James R. Larus, Robert Davidson, Trishul M. Chilimbi
  • Patent number: 6330556
    Abstract: Fields which are individually addressable data elements in data structures are reordered to improve the efficiency of cache line access. Temporal data regarding the referencing of such fields is obtained, and a tool is used to construct a field affinity graph of temporal access affinities between the fields. Nodes in the graph represent fields, and edges between the nodes are weighted to indicate field affinity. A first pass greedy algorithm attempts to combine high affinity fields in the same cache line or block. Constraints are used to reject invalid combinations of fields. Data structures such as class are partitioned into heavily referenced and less heavily referenced portions. The partitioning is based on profile information about field access counts with indirect addressing used to reference the less heavily referenced partitioned class. A class co-location scheme is used to ensure that temporally correlated classes are placed near each other in cache blocks.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: December 11, 2001
    Inventors: Trishul M. Chilimbi, James R. Larus, Robert Davidson
  • Patent number: 6321240
    Abstract: Fields which are individually addressable data elements in data structures are reordered to improve the efficiency of cache line access. Temporal data regarding the referencing of such fields is obtained, and a tool is used to construct a field affinity graph of temporal access affinities between the fields. Nodes in the graph represent fields, and edges between the nodes are weighted to indicate field affinity. A first pass greedy algorithm attempts to combine high affinity fields in the same cache line or block. Constraints are used to reject invalid combinations of fields. Data structures such as class are partitioned into heavily referenced and less heavily referenced portions. The partitioning is based on profile information about field access counts with indirect addressing used to reference the less heavily referenced partitioned class. A class co-location scheme is used to ensure that temporally correlated classes are placed near each other in cache blocks.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: November 20, 2001
    Inventors: Trishul M. Chilimbi, James R. Larus