Patents by Inventor Trismardawi Tanadi

Trismardawi Tanadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240036753
    Abstract: A processing device in a memory sub-system determines whether a media endurance metric associated with a memory block of a memory device satisfies one or more conditions. In response to the one or more conditions being satisfied, a temperature of the memory block is compared to a threshold temperature range. In response to determining the temperature of the memory block is within the threshold temperature range, the processing device causes execution of a wordline leakage test of a wordline group of a set of wordline groups of the memory block. A result of the wordline leakage test of the target wordline group is determined and an action is executed based on the result of the wordline leakage test.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Wai Leong Chin, Francis Chee Khai Chew, Trismardawi Tanadi, Chun Sum Yeung, Lawrence Dumalag, Ekamdeep Singh
  • Patent number: 11594522
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Publication number: 20210351164
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Application
    Filed: July 26, 2021
    Publication date: November 11, 2021
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Patent number: 11107795
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 31, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Patent number: 11092990
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: August 17, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Trismardawi Tanadi
  • Publication number: 20190319013
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Application
    Filed: June 27, 2019
    Publication date: October 17, 2019
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Patent number: 10388630
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: August 20, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Publication number: 20180364749
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Application
    Filed: August 22, 2018
    Publication date: December 20, 2018
    Inventor: Trismardawi Tanadi
  • Patent number: 10120404
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: November 6, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Trismardawi Tanadi
  • Publication number: 20180082983
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Application
    Filed: December 1, 2017
    Publication date: March 22, 2018
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Patent number: 9875993
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 23, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Publication number: 20170336820
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Application
    Filed: August 8, 2017
    Publication date: November 23, 2017
    Inventor: Trismardawi Tanadi
  • Patent number: 9785171
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: October 10, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Trismardawi Tanadi
  • Publication number: 20170207195
    Abstract: Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 20, 2017
    Inventors: Nathan J. Sirocka, Trismardawi Tanadi, Andrew D. Proescholdt
  • Publication number: 20160209859
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 21, 2016
    Inventor: Trismardawi Tanadi
  • Patent number: 9305905
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: April 5, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Trismardawi Tanadi
  • Publication number: 20150070056
    Abstract: An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an electronic device include detecting a power-up event with the semiconductor dies in the stack, and responsive to the power-up event, powering up a first semiconductor die in the stack at a first time, and powering up a second semiconductor die in the stack at a second time that is different from the first time.
    Type: Application
    Filed: September 6, 2013
    Publication date: March 12, 2015
    Applicant: Micron Technology, Inc.
    Inventor: Trismardawi Tanadi