Abstract: Disclosed herein are methods for identifying physicochemical properties associated with protein corona formation at the level of proteins and NP-functionalization. Further disclosed herein are compositions comprising combinations of particles configured for low abundance protein collection and deep proteomic analysis.

Abstract: Methods and catalysts for oxidizing ammonia to nitrogen are described. Specifically, diruthenium complexes that spontaneously catalyze this reaction are disclosed. Accordingly, the disclosed methods and catalysts can be used in various electrochemical cell-based energy storage and energy production applications that could form the basis for a potential nitrogen economy.

Abstract: Methods and catalysts for oxidizing ammonia to nitrogen are described. Specifically, diruthenium complexes that spontaneously catalyze this reaction are disclosed. Accordingly, the disclosed methods and catalysts can be used in various electrochemical cell-based energy storage and energy production applications that could form the basis for a potential nitrogen economy.

Abstract: Methods and catalysts for oxidizing ammonia to nitrogen are described. Specifically, diruthenium complexes that spontaneously catalyze this reaction are disclosed. Accordingly, the disclosed methods and catalysts can be used in various electrochemical cell-based energy storage and energy production applications that could form the basis for a potential nitrogen economy.

Abstract: Embodiments are directed to capturing and storing historical data regarding thermal remediations, to predicting and acting on remediation futures and to communicating with applications regarding thermal remediations implemented on the computer system. In one scenario, a computer system determines which thermal remediations are currently being implemented on a monitored computing device. The thermal remediations are based on the monitored computing device's current operating environment including the physical thermal environment and/or the current software execution environment. The computer system further tracks thermal remediation levels for those thermal remediations that are currently being implemented on the monitored computing device, the thermal remediation levels indicating the degree to which each thermal remediation is implemented.

Abstract: Each processor core in a computing device supports various different frequency ranges, also referred to as p-states, and can operate to run threads at any one of those different frequency ranges. Threads in the computing device are assigned one of multiple importance levels. A processor core is configured to run at a particular frequency range or in accordance with a particular energy performance preference based on the importance level of the thread it is running. A utilization factor of a processor core can also be determined over some time duration, the utilization factor being based on the amount of time during the time duration that the processor core was running a thread(s), and also based on the importance levels of the thread(s) run during the time duration. The utilization factor can then be used to determine whether to park the processor core.

Abstract: Each processor core in a device supports various different frequency ranges and/or energy performance preferences, and can operate to run threads at any one of those different frequency ranges and/or energy performance preferences. Processor cores are partitioned into different groups, each group running at different frequency ranges and/or energy performance preferences. Threads in the device are assigned one of multiple importance levels and scheduled to run on a processor core in a particular group based on the importance level of the thread. Lower importance level threads are scheduled to run in a group that is more power efficient, and higher importance level threads are scheduled to run in a group that is higher performance. The group that a processor core is part of can change during operation of the device based on the needs of the device and/or applications running on the device.

Abstract: An operating system includes an interrupt router that dynamically steers each interrupt to one or more processors within set of processors based on overall load information from the set of processors. An interrupt source is assigned to a processor based on the load imposed by the interrupt source and the target overall load for the processor. For example, each processor can maintain information about each interrupt it processes over time. The operating system receives this historical load information to determine an expected load for interrupts of a given type from a given device, an overall load on the system, and a target load for each processor. Given a set of interrupt sources, their expected loads, and target load for each processor, each interrupt source can be assigned dynamically to a processor during runtime of the system. These assignments can be changed given current operating conditions of the system.

Abstract: In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device.

Abstract: In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device.

Abstract: Each processor core in a device supports various different frequency ranges and/or energy performance preferences, and can operate to run threads at any one of those different frequency ranges and/or energy performance preferences. Processor cores are partitioned into different groups, each group running at different frequency ranges and/or energy performance preferences. Threads in the device are assigned one of multiple importance levels and scheduled to run on a processor core in a particular group based on the importance level of the thread. Lower importance level threads are scheduled to run in a group that is more power efficient, and higher importance level threads are scheduled to run in a group that is higher performance. The group that a processor core is part of can change during operation of the device based on the needs of the device and/or applications running on the device.

Abstract: Each processor core in a computing device supports various different frequency ranges, also referred to as p-states, and can operate to run threads at any one of those different frequency ranges. Threads in the computing device are assigned one of multiple importance levels. A processor core is configured to run at a particular frequency range or in accordance with a particular energy performance preference based on the importance level of the thread it is running. A utilization factor of a processor core can also be determined over some time duration, the utilization factor being based on the amount of time during the time duration that the processor core was running a thread(s), and also based on the importance levels of the thread(s) run during the time duration. The utilization factor can then be used to determine whether to park the processor core.

Abstract: An operating system includes an interrupt router that dynamically steers each interrupt to one or more processors within set of processors based on overall load information from the set of processors. An interrupt source is assigned to a processor based on the load imposed by the interrupt source and the target overall load for the processor. For example, each processor can maintain information about each interrupt it processes over time. The operating system receives this historical load information to determine an expected load for interrupts of a given type from a given device, an overall load on the system, and a target load for each processor. Given a set of interrupt sources, their expected loads, and target load for each processor, each interrupt source can be assigned dynamically to a processor during runtime of the system. These assignments can be changed given current operating conditions of the system.

Abstract: Heterogeneous thread scheduling techniques are described in which a processing workload is distributed to heterogeneous processing cores of a processing system. The heterogeneous thread scheduling may be implemented based upon a combination of periodic assessments of system-wide power management considerations used to control states of the processing cores and higher frequency thread-by-thread placement decisions that are made in accordance with thread specific policies. In one or more implementations, a system workload context is periodically analyzed for a processing system having heterogeneous cores including power efficient cores and performance oriented cores. Based on the periodic analysis, cores states are set for some of the heterogeneous cores to control activation of the power efficient cores and performance oriented cores for thread scheduling.

Abstract: An operating system is provided in which an interrupt router dynamically steers each interrupt to one or more processors within set of processors based on overall load information from the set of processors. An interrupt source is assigned to a processor based on the load imposed by the interrupt source and the target overall load for the processor. For example, each processor can maintain information about each interrupt it processes over time. The operating system receives this historical load information to determine an expected load for interrupts of a given type from a given device, an overall load on the system, and a target load for each processor. Given a set of interrupt sources, their expected loads, and target load for each processor, each interrupt source can be assigned dynamically to a processor during runtime of the system. On a regular basis, these assignments can be changed given current operating conditions of the system.

Abstract: Embodiments are directed to capturing and storing historical data regarding thermal remediations, to predicting and acting on remediation futures and to communicating with applications regarding thermal remediations implemented on the computer system. In one scenario, a computer system determines which thermal remediations are currently being implemented on a monitored computing device. The thermal remediations are based on the monitored computing device's current operating environment including the physical thermal environment and/or the current software execution environment. The computer system further tracks thermal remediation levels for those thermal remediations that are currently being implemented on the monitored computing device, the thermal remediation levels indicating the degree to which each thermal remediation is implemented.

Abstract: Heterogeneous thread scheduling techniques are described in which a processing workload is distributed to heterogeneous processing cores of a processing system. The heterogeneous thread scheduling may be implemented based upon a combination of periodic assessments of system-wide power management considerations used to control states of the processing cores and higher frequency thread-by-thread placement decisions that are made in accordance with thread specific policies. In one or more implementations, a system workload context is periodically analyzed for a processing system having heterogeneous cores including power efficient cores and performance oriented cores. Based on the periodic analysis, cores states are set for some of the heterogeneous cores to control activation of the power efficient cores and performance oriented cores for thread scheduling.

Abstract: In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device.

Abstract: In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device.

Abstract: An operating system is provided in which an interrupt router dynamically steers each interrupt to one or more processors within set of processors based on overall load information from the set of processors. An interrupt source is assigned to a processor based on the load imposed by the interrupt source and the target overall load for the processor. For example, each processor can maintain information about each interrupt it processes over time. The operating system receives this historical load information to determine an expected load for interrupts of a given type from a given device, an overall load on the system, and a target load for each processor. Given a set of interrupt sources, their expected loads, and target load for each processor, each interrupt source can be assigned dynamically to a processor during runtime of the system. On a regular basis, these assignments can be changed given current operating conditions of the system.