Patents by Inventor Trong L. Nuyen

Trong L. Nuyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4455564
    Abstract: The invention relates to semiconductor devices of the transistor type operating at high frequencies.In order to make the drain/source current characteristic linear with the voltage applied to the grid and in order to retain a construction technology which is compatible with existing technologies the invention provides an Al.sub.x Ga.sub.1-x As layer between the substrate and the active GaAs layer. A supplementary, highly doped, GaAs layer and a supplementary semi-insulating Al.sub.x Ga.sub.1-x As layer modify the source and drain access resistances and the output resistance.Application to devices operating at ultra-high frequencies.
    Type: Grant
    Filed: June 9, 1983
    Date of Patent: June 19, 1984
    Assignee: Thomson-CSF
    Inventors: Daniel Delagebeaudeuf, Trong L. Nuyen
  • Patent number: 4450462
    Abstract: The invention relates to field effect transistors having a non-volatile memory effect of the MIS type. According to the invention the transistor comprises, in addition to substrate (17), a source (21), a drain (22), a grid formed by a semi-insulating film (18) and an insulating layer (19), whose semi-insulating film (18) has a thickness below 100 angstroms and is formed from a semiconductive material of groups III-V having a broader forbidden band than that of the active layer (16) on which it is deposited. Useful applications of the invention include ultra-high frequency transistors for telecommunications.
    Type: Grant
    Filed: August 19, 1981
    Date of Patent: May 22, 1984
    Assignee: Thomson-CSF
    Inventor: Trong L. Nuyen
  • Patent number: 4430740
    Abstract: A semiconductor laser wherein a wide range of laser emission wavelengths can be obtained by varying the composition of monocrystalline alloys employed as semiconductor material. The semiconductor structure comprises on a monocrystalline indium phosphide substrate of a predetermined conductivity type successive epitaxial layers consisting of a first confinement layer of the same conductivity type, an active layer having the formula (Ga.sub.x Al.sub.1-x).sub.0.47 In.sub.0.53 As where x is within the range of 0 to 0.27, and a second confinement layer of opposite conductivity type. The confinement layers are composed of either InP or a ternary alloy Al.sub.0.47 In.sub.0.53 As or a quaternary alloy Ga.sub.x' Al.sub.1-x' As.sub.y' Sb.sub.1-y' where x' and y' are chosen so that the material should have a predetermined crystal lattice and an energy gap of greater width than the substrate material.
    Type: Grant
    Filed: December 2, 1981
    Date of Patent: February 7, 1984
    Assignee: Thomson-CSF
    Inventors: Trong L. Nuyen, Baudouin de Cremoux