Patents by Inventor Troy A. Chase

Troy A. Chase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240429324
    Abstract: A sensing device is formed on a first side of a wafer device, forming a cavity between sensing device and the wafer device. An opening of the cavity faces away from the sensing device, positioned on a second side of the wafer device (positioned opposite to the first side). A hydrophobic layer is formed on the second side of the wafer device, on the cavity, on an interior and on an exterior of the sensing device. A mask is formed on the hydrophobic layer on the second side. The mask is perforated that maintains at least a portion of the hydrophobic layer covering the second side of the wafer device exposed. Light is applied to the second side of the wafer device that removes the at least the portion of the hydrophobic layer covering the second side of the wafer device that is exposed. The mask is removed.
    Type: Application
    Filed: January 22, 2024
    Publication date: December 26, 2024
    Inventors: Jotaro Akiyama, Yuki Shibano, Kento Kaneko, Daishi Arimatsu, Troy Chase
  • Publication number: 20240230400
    Abstract: Low-cost, robust, and high performance microelectromechanical systems (MEMS) acoustic sensors are described. Described MEMS acoustic sensors can comprise a set of etch release structures in the acoustic sensor membrane that facilitates rapid and/or uniform etch release of the acoustic sensor membrane. In addition, MEMS acoustic sensors can comprise a set of membrane position control structures of the acoustic sensor membrane that can reduce the bending stress of the acoustic sensor membrane. MEMS acoustic sensors can further comprise a three layer acoustic sensor membrane that provides increased robustness. Further design flexibility and improvements are described that provide increased robustness and/or cost savings, and a low cost fabrication process for MEMS acoustic sensors is provided.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Inventors: Pirmin Rombach, Kurt Rasmussen, Dennis Mortensen, Jan Ravnkilde, Cheng-Yen Liu, Jotaro Akiyama, Sushil Bharatan, Troy Chase
  • Publication number: 20240133736
    Abstract: Low-cost, robust, and high performance microelectromechanical systems (MEMS) acoustic sensors are described. Described MEMS acoustic sensors can comprise a set of etch release structures in the acoustic sensor membrane that facilitates rapid and/or uniform etch release of the acoustic sensor membrane. In addition, MEMS acoustic sensors can comprise a set of membrane position control structures of the acoustic sensor membrane that can reduce the bending stress of the acoustic sensor membrane. MEMS acoustic sensors can further comprise a three layer acoustic sensor membrane that provides increased robustness. Further design flexibility and improvements are described that provide increased robustness and/or cost savings, and a low cost fabrication process for MEMS acoustic sensors is provided.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Pirmin Rombach, Kurt Rasmussen, Dennis Mortensen, Jan Ravnkilde, Cheng-Yen Liu, Jotaro Akiyama, Sushil Bharatan, Troy Chase
  • Patent number: 9664868
    Abstract: A connector insert arrangement, an active optical cable and methods are described. The connector insert is receivable in a connector housing for removable engagement with a complementary connector. Dielectric inserts each support one or more electrical contacts for access by the complementary connector and each electrical contact is selected as one of a contact pad and a spring probe pin for electrical contact with a complementary spring probe pin and complementary contact pad, respectively, in the complementary connector. A ground body supports the dielectric inserts to maintain a characteristic transmission line impedance along each of a plurality of high speed data paths such that each high speed data path serves as an independent transmission line structure that provides a data transfer rate of at least 1 gigabit per second. An active optical cable is described that can be hermaphroditic.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: May 30, 2017
    Assignee: Glenair, Inc.
    Inventors: Ronald T. Logan, Jr., Leo Kha, Lutz Adrian Mueller, Troy Chase, Narek Hacopian, Matthew P. Flach
  • Publication number: 20160370547
    Abstract: A connector insert arrangement, an active optical cable and methods are described. The connector insert is receivable in a connector housing for removable engagement with a complementary connector. Dielectric inserts each support one or more electrical contacts for access by the complementary connector and each electrical contact is selected as one of a contact pad and a spring probe pin for electrical contact with a complementary spring probe pin and complementary contact pad, respectively, in the complementary connector. A ground body supports the dielectric inserts to maintain a characteristic transmission line impedance along each of a plurality of high speed data paths such that each high speed data path serves as an independent transmission line structure that provides a data transfer rate of at least 1 gigabit per second. An active optical cable is described that can be hermaphroditic.
    Type: Application
    Filed: June 17, 2015
    Publication date: December 22, 2016
    Inventors: Ronald T. Logan, JR., Leo Kha, Lutz Adrian Mueller, Troy Chase, Narek Hacopian, Matthew P. Flach
  • Publication number: 20070269959
    Abstract: A method for fabricating microchip devices is provided. The method includes the steps of providing a first planar substrate, locating at least one first alignment feature in the surface of the first planar substrate, and bonding a second substrate to the surface of the first planar substrate. The method further includes the step of aligning subsequent process operations performed on at least one of the first and second substrates to visible alignment features of the first substrate, wherein the visible alignment features are at least one of the first alignment feature and a visible feature that corresponds to the location of the first alignment feature.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 22, 2007
    Inventors: John E. Freeman, Steven E. Staller, Troy A. Chase, William J. Baney
  • Patent number: 7118991
    Abstract: A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: October 10, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Troy A. Chase, James H. Logsdon, James Kingery
  • Publication number: 20050227400
    Abstract: A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.
    Type: Application
    Filed: April 1, 2004
    Publication date: October 13, 2005
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: Troy Chase, James Logsdon, James Kingery
  • Patent number: 6500348
    Abstract: A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. In order to eliminate or at least reduce heat and/or charge accumulation that accelerates the DRIE etch rate of certain suspended structures, means are provided to electrically and/or thermally tie the suspended structures to each other and/or the surrounding bulk substrate. As a result, the process window is increased to allow slower-etching structures to be etched to completion without overetching the more rapidly-etched structures.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: December 31, 2002
    Assignee: Delphi Technologies, Inc.
    Inventors: Troy A. Chase, John C. Christenson
  • Publication number: 20020111031
    Abstract: A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. In order to eliminate or at least reduce heat and/or charge accumulation that accelerates the DRIE etch rate of certain suspended structures, means are provided to electrically and/or thermally tie the suspended structures to each other and/or the surrounding bulk substrate. As a result, the process window is increased to allow slower-etching structures to be etched to completion without overetching the more rapidly-etched structures.
    Type: Application
    Filed: February 14, 2001
    Publication date: August 15, 2002
    Inventors: Troy A. Chase, John C. Christenson