Patents by Inventor Troy A. Yocum

Troy A. Yocum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7354853
    Abstract: The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in semiconductor manufacturing. The semiconductor substrate is exposed to a reducing plasma chemistry which passivates any exposed copper (40). The tantalum or tantalum nitride films are selectively removed using an oxidizing plasma chemistry.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: April 8, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Mona M. Eissa, Troy A. Yocum
  • Publication number: 20060172556
    Abstract: The present invention provides a method for manufacturing a semiconductor device as well as a semiconductor device. The method, among other steps, may include forming a gate structure (230) over a substrate (210), and forming a strain inducing film (330, 520, 530 or 810) over the substrate (210) and proximate the gate structure (230), the strain inducing film (330, 520, 530 or 810) comprising a bis t-butylaminosilane (BTBAS) silicon nitride layer formed using ratio of bis t-butylaminosilane (BTBAS) to ammonia (NH3) of 1:1 or greater.
    Type: Application
    Filed: February 1, 2006
    Publication date: August 3, 2006
    Applicant: Texas Instruments Incorporated
    Inventors: Wayne Bather, Narendra Mehta, Troy Yocum
  • Publication number: 20050250337
    Abstract: The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in semiconductor manufacturing. The semiconductor substrate is exposed to a reducing plasma chemistry which passivates any exposed copper (40). The tantalum or tantalum nitride films are selectively removed using an oxidizing plasma chemistry.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 10, 2005
    Inventors: Mona Eissa, Troy Yocum
  • Patent number: 6939795
    Abstract: The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in semiconductor manufacturing. The semiconductor substrate is exposed to a reducing plasma chemistry which passivates any exposed copper (40). The tantalum nitride films are selectively removed using an oxidizing plasma chemistry.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: September 6, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Mona M. Eissa, Troy A. Yocum
  • Patent number: 6905943
    Abstract: In one embodiment, a method for forming a semiconductor structure in manufacturing a semiconductor device includes providing a pad layer on a surface of a substrate, providing a nitride layer on the pad layer, and providing a sacrificial oxide layer on the nitride layer. In a first etching step, at least the sacrificial oxide and nitride layers are etched to define opposing substantially vertical surfaces of at least the sacrificial oxide and nitride layers. In a second etching step, the nitride layer is etched such that the opposing substantially vertical surfaces of the nitride layer are recessed from the opposing substantially vertical surfaces of the sacrificial oxide layer, the sacrificial oxide layer substantially preventing the nitride layer from decreasing in thickness as a result of the etching of the nitride layer. In a third etching step, the substrate is etched to form a trench extending into the substrate for purposes of defining one or more isolation regions adjacent the trench.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: June 14, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Juanita DeLoach, Freidoon Mehrad, Brian M. Trentman, Troy A. Yocum
  • Publication number: 20050101101
    Abstract: In one embodiment, a method for forming a semiconductor structure in manufacturing a semiconductor device includes providing a pad layer on a surface of a substrate, providing a nitride layer on the pad layer, and providing a sacrificial oxide layer on the nitride layer. In a first etching step, at least the sacrificial oxide and nitride layers are etched to define opposing substantially vertical surfaces of at least the sacrificial oxide and nitride layers. In a second etching step, the nitride layer is etched such that the opposing substantially vertical surfaces of the nitride layer are recessed from the opposing substantially vertical surfaces of the sacrificial oxide layer, the sacrificial oxide layer substantially preventing the nitride layer from decreasing in thickness as a result of the etching of the nitride layer. In a third etching step, the substrate is etched to form a trench extending into the substrate for purposes of defining one or more isolation regions adjacent the trench.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 12, 2005
    Inventors: Juanita DeLoach, Freidoon Mehrad, Brian Trentman, Troy Yocum
  • Publication number: 20040058528
    Abstract: The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in semiconductor manufacturing. The semiconductor substrate is exposed to a reducing plasma chemistry which passivates any exposed copper (40). The tantalum nitride films are selectively removed using an oxidizing plasma chemistry.
    Type: Application
    Filed: September 23, 2002
    Publication date: March 25, 2004
    Inventors: Mona M. Eissa, Troy A. Yocum
  • Patent number: 6686283
    Abstract: A method for forming planar isolation structures for integrated circuits. A etch barrier is formed over the isolation fill material and an etch back is performed to remove material above unetched portions of the substrate. The exposed fill material is etched and planarized to form a planar isolation structure.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: February 3, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Shawn T. Walsh, John E. Campbell, Somit Joshi, James B. Friedmann, Michael J. McGranaghan, Janice D. Makos, Arun Sivasothy, Troy A. Yocum, Jaideep Mavoori, Wayne A. Bather, Joe G. Tran, Ju-Ai Ruan, Michelle L. Hartsell, Gregory B. Shinn
  • Patent number: 6551943
    Abstract: A post-etch clean up process for OSG. After the trench (112)/via (114) etch in a dual damascene process, a wet chemistry comprising HF and H2O2 is used to remove residues without etching or damaging the OSG film in the ILD (108) or IMD (110).
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: April 22, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Mona M. Eissa, Troy A. Yocum
  • Patent number: 6316350
    Abstract: A post laser blown fuse slag etch for a copper fuse (30) with a barrier metal liner (18), (e.g., TaxNy, Ta, Ti, TixNy). After the fuse (30) is blown, copper and copper complexes may be selectively removed using a nitric acid and H2O2 solution. Then, a corrosion inhibitor is used to passivate the surface of exposed copper (34). Next, the barrier metal (18) of slag (22) is removed using a strong basic etch chemistry comprising a base plus H2O2. This solution removes the barrier metal selectively with respect to passivation layer (e.g., silicon nitride) (16) and oxides/FSG (12). A diluted HF solution may then be used to remove any trace metal or oxidized copper.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: November 13, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Mona M. Eissa, Troy A. Yocum