Patents by Inventor Troy V. Gugel

Troy V. Gugel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of reducing photoresist defects during fabrication of a semiconductor device
    Patent number: 8163468
    Abstract: Reducing or eliminating watermark-type defects during semiconductor device fabrication are described and can comprise treating photoresist using one of several embodiments. In some embodiments, the propensity for defect formation is reduced/eliminated by conditioning the photoresist surface through the application and removal of a sacrificial overcoat. In other embodiments, existing defects are reduced/eliminated by exposing the photoresist surface to a defect-stripping material during post-develop processing.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: April 24, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Yoshiki Hishiro, Lijing Gou, Scott E. Sills, Hiroyuki Mori, Paul D. Shirley, Troy V. Gugel, Adam L. Olson
  • METHOD OF REDUCING PHOTORESIST DEFECTS DURING FABRICATION OF A SEMICONDUCTOR DEVICE
    Publication number: 20090226847
    Abstract: Reducing or eliminating watermark-type defects during semiconductor device fabrication are described and can comprise treating photoresist using one of several embodiments. In some embodiments, the propensity for defect formation is reduced/eliminated by conditioning the photoresist surface through the application and removal of a sacrificial overcoat. In other embodiments, existing defects are reduced/eliminated by exposing the photoresist surface to a defect-stripping material during post-develop processing.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Yoshiki Hishiro, Lijing Gou, Scott E. Sills, Hiroyuki Mori, Paul D. Shirley, Troy V. Gugel, Adam L. Olson
  • Method for measuring registration of overlapping material layers of an integrated circuit
    Patent number: 7095885
    Abstract: A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by an optical technique or a scanning electron microscope, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to tolerance values and if out of tolerance misregistration of the two layers is indicated.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: August 22, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Eugene A. DeLaRosa, Troy V. Gugel