Abstract: In some examples, a method of sensing an ink level includes applying a pre-charge voltage to a sense capacitor to charge the sense capacitor with a charge, sharing the charge between the sense capacitor and a reference capacitor, causing a reference voltage at a gate of an evaluation transistor, and determining a resistance from a drain to a source of the evaluation transistor that results from the reference voltage.

Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.

Abstract: In some examples, an ink level sensor includes a sense capacitor between a first node and ground, a first switch to couple a first voltage to the first node and charge the sense capacitor, a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node, and a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage.

Abstract: An inkjet print head includes data signal lines configured to supply inkjet control voltages and non-volatile memory cell random access addresses. The inkjet print head includes an inkjet nozzle array wherein each nozzle in the array is configured to communicate with a data signal line. Also a non-volatile attribute memory cell array is included in the inkjet print head wherein each memory cell in the array is accessed through a data signal line shared with the nozzle array.

Abstract: An EPROM cell includes a semiconductor substrate, having source and drain regions, a floating gate, including a semiconductive polysilicon layer electrically interconnected with a first metal layer, and a control gate, including a second metal layer. The floating gate is disposed adjacent to the source and drain regions and separated from the semiconductor substrate by a first dielectric layer, and the second metal layer of the control gate is capacitively coupled to the first metal layer with a second dielectric layer therebetween.

Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.

Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.

Abstract: An inkjet print head includes data signal lines configured to supply inkjet control voltages and non-volatile memory cell random access addresses. The inkjet print head includes an inkjet nozzle array wherein each nozzle in the array is configured to communicate with a data signal line. Also a non-volatile attribute memory cell array is included in the inkjet print head wherein each memory cell in the array is accessed through a data signal line shared with the nozzle array.

Abstract: In some examples, an ink level sensor includes a sense capacitor between a first node and ground, a first switch to couple a first voltage to the first node and charge the sense capacitor, a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node, and a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage.

Abstract: In some examples, a method of sensing an ink level includes applying a pre-charge voltage to a sense capacitor to charge the sense capacitor with a charge, sharing the charge between the sense capacitor and a reference capacitor, causing a reference voltage at a gate of an evaluation transistor, and determining a resistance from a drain to a source of the evaluation transistor that results from the reference voltage.

Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.

Abstract: In an embodiment, a method of sensing an ink level includes applying a pre-charge voltage Vp to a sense capacitor to charge the sense capacitor with a charge Q1, sharing Q1 between the sense capacitor and a reference capacitor, causing a reference voltage Vg at the gate of an evaluation transistor, and determining a resistance from drain to source of the evaluation transistor that results from Vg.

Abstract: An inkjet print head includes data signal lines configured to supply inkjet control voltages and non-volatile memory cell random access addresses. The inkjet print head includes an inkjet nozzle array wherein each nozzle in the array is configured to communicate with a data signal line. Also a non-volatile attribute memory cell array is included in the inkjet print head wherein each memory cell in the array is accessed through a data signal line shared with the nozzle array.

Abstract: A device including a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is situated over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.

Abstract: A fluid ejection device includes a plurality of address lines and a fire line for communicating a fire signal. The device also includes a plurality of nozzle circuits coupled to the fire line and the plurality of address lines. Each nozzle circuit is configured, when enabled, to eject fluid via a different one of a plurality of nozzles in response to the fire signal. A subset of the plurality of address lines is coupled to each pair of the plurality of nozzle circuits. Each subset that is coupled to one of the pairs of nozzle circuits is selected so that simultaneous activation of every address line of that subset simultaneously enables each nozzle circuit in the pair or pairs of nozzle circuits coupled to that triad and none of the other nozzle circuits of the plurality of nozzle circuits.

Abstract: A system for drop detection of fluid drops ejected by a printing device includes a drop detector comprising a radiation source and radiation sensor for illuminating a region in which drops are ejected by a print bar and detecting radiation from the radiation source that is reflected by backscattering from the drops to the radiation sensor; and a controller for controlling the drop detector and the print bar, wherein the controller uses a signal output by the drop detector to determine whether nozzles of the print bar are operating properly.

Abstract: In one example, a drop detector includes a light source for illuminating drops passing through a drop zone, multiple light detectors near the light source for detecting light scattered off drops passing through the drop zone, and multiple lenses each configured to focus light from the drop zone on one of the light detectors. In one example, each light detector is arranged in the same plane with all of the other light detectors. In one example, the lenses are configured to focus light from two different spaces in the drop zone on different detectors or groups of detectors. In one example, the lenses are configured to focus light from a single space in the drop zone on multiple detectors.

Abstract: A device including a drain, a channel, a floating gate, and a control gate. The channel surrounds the drain and has a channel area. The floating gate includes an active floating gate region that has an active floating gate region area. The control gate is coupled to the active floating gate region via a control capacitance, wherein the active floating gate region area is smaller than the channel area.

Abstract: The present disclosure describes a compound slot, and systems and methods of forming the compound slot. An example of a compound slot includes a wafer, where the compound slot includes a trench along a long axis of the compound slot and on a top surface of the wafer, where the trench passes through an initial portion of a total depth of the wafer. A number of openings pass through a remaining portion of the total depth of the wafer, where at least a retained portion of a bottom of the trench is present around a perimeter of each of the number of openings.

Abstract: The present disclosure describes a compound slot, and systems and methods of forming the compound slot. An example of a compound slot includes a wafer, where the compound slot includes a trench along a long axis of the compound slot and on a top surface of the wafer, where the trench passes through an initial portion of a total depth of the wafer. A number of openings pass through a remaining portion of the total depth of the wafer, where at least a retained portion of a bottom of the trench is present around a perimeter of each of the number of openings.