Patents by Inventor Trung T. Nguyen
Trung T. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10669746Abstract: A multi-function latch and latch bolt includes a pair of mechanical fastener to be installed on a gate for the purpose of holding the gate in closed position, and that a person standing on the inside of the fence can disengage the latch hook bracket from the latch bolt, or disengage the latch bolt from the latch hook bracket in any of which method to unlatch and open the gate from inside the fence even when the outside of the latch is locked. On the other hand, when the latch is not locked on the inside but locked on the outside with an incorporated lock, keyed or combination padlock; then a person standing on the outside of the gate may open the gate if he/she has an appropriate key or knows the combination codes in order to unlock, unlatch and open the gate from outside the fence.Type: GrantFiled: July 22, 2015Date of Patent: June 2, 2020Inventor: Trung T Nguyen
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Publication number: 20170022736Abstract: A multi-function latch and latch bolt are configured as a pair of mechanical fastener to be installed on a gate for the purpose of holding the gate in closed position, and that a person standing on the inside of the fence can disengage the latch hook bracket from the latch bolt, or disengage the latch bolt from the latch hook bracket in any of which method to unlatch and open the gate from inside the fence even when the outside of the latch is locked. On the other hand, when the latch is not locked on the inside but locked on the outside with an incorporated lock, keyed or combination padlock; then a person standing on the outside of the gate may open the gate if he/she has an appropriate key or knows the combination codes in order to unlock, unlatch and open the gate from outside the fence.Type: ApplicationFiled: July 22, 2015Publication date: January 26, 2017Inventor: Trung T. Nguyen
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Patent number: 8823573Abstract: System and method for converting a high bandwidth analog signal to a digital signal including: receiving the high bandwidth analog signal; splitting the high bandwidth analog signal to M parallel channels; delaying the split signal in each channel with N*T delays, respectively; sampling each M delayed signals by M relatively prime sampling rate, wherein the sampling rate for each M delayed signal is smaller than the Nyquist frequency of the high bandwidth analog signal; upsampling each M sampled signal, wherein the upsampling rate for each M sampled signal satisfies the Nyquist frequency of the high bandwidth analog signal; combining the M up sampled signals into a combined signal; and reconstructing the combined signal to generate a digital signal representing the high bandwidth analog signal.Type: GrantFiled: February 20, 2013Date of Patent: September 2, 2014Assignee: Raytheon CompanyInventors: Tuan V. Nguyen, Oleg Brovko, Alison Kim, Trung T. Nguyen
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Publication number: 20140232581Abstract: System and method for converting a high bandwidth analog signal to a digital signal including: receiving the high bandwidth analog signal; splitting the high bandwidth analog signal to M parallel channels; delaying the split signal in each channel with N*T delays, respectively; sampling each M delayed signals by M relatively prime sampling rate, wherein the sampling rate for each M delayed signal is smaller than the Nyquist frequency of the high bandwidth analog signal; upsampling each M sampled signal, wherein the upsampling rate for each M sampled signal satisfies the Nyquist frequency of the high bandwidth analog signal; combining the M up sampled signals into a combined signal; and reconstructing the combined signal to generate a digital signal representing the high bandwidth analog signal.Type: ApplicationFiled: February 20, 2013Publication date: August 21, 2014Applicant: RAYTHEON COMPANYInventors: Tuan V. Nguyen, Oleg Brovko, Alison Kim, Trung T. Nguyen
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Patent number: 8424126Abstract: A controllable toilet flushing apparatus comprises an activating handle mechanism configured in a hollow housing assembly positioned under a toilet tank to be placed directly or indirectly over a toilet bowl; a hollow housing assembly where the activating handle mechanism and an outlet funnel are configured from within is manufactured to work with a mating sealed toilet tank or an open-top toilet tank; the activating handle mechanism comprises a horizontal shaft loaded with at least one torsion spring, a lift arm positioned under the outlet valve opening is attached to the horizontal shaft at the pivotal end and the other end can be attached to the outlet valve cap, at least one activating handle attached to the horizontal shaft end thereof to activate a flush by forcing the outlet valve cap lifted upwardly which allows water from the toilet tank to be discharged into the toilet bowl.Type: GrantFiled: March 30, 2011Date of Patent: April 23, 2013Inventor: Trung T Nguyen
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Patent number: 7734146Abstract: Video data in an encoded frame is reduced by adjusting orthogonal transform coefficients in the encoded frame during trick play operation such as fast forward or fast reverse. The orthogonal transform coefficients are adjusted by selecting essential orthogonal transform coefficients with high energy and non-essential orthogonal transform coefficients with low energy, maintaining or strengthening the essential orthogonal transform coefficients and attenuating or removing the non-essential orthogonal transform coefficients. In an MPEG bit stream, the encoded frame is an I-frame and the orthogonal transform coefficients are discrete cosine transform (DCT) coefficients.Type: GrantFiled: July 11, 2006Date of Patent: June 8, 2010Assignee: Seagate TechnologyInventors: An H. Nguyen, Trung T. Nguyen, Gaetano Bonfiglio, Yin Shih
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Patent number: 6888490Abstract: A synthetic aperture radar (SAR) image of a wide coverage area is acquired during a frame containing a first plurality of ambiguities induced in the SAR image from radar scatterers within the area. The area is illuminated with radar pulses and a segmented receive antenna oriented towards the area. The segmented receive antenna has a second plurality of sub-apertures, where the second plurality of sub-apertures is larger than the first plurality of ambiguities. Each sub-aperture has its own receiver. The digital stream from each receiver is stored in a computer for the duration of the frame to obtain frame data. A SAR image is extracted from the frame data. The first plurality of ambiguities are identified from analysis of the frame data, and a correction is computed to account for the first plurality of ambiguities contained within the synthetic aperture image. The correction is applied to reduce distortions caused by the ambiguities in the SAR image.Type: GrantFiled: July 20, 2004Date of Patent: May 3, 2005Assignee: Raytheon CompanyInventors: Oleg Brovko, Eric Wayne Day, Trung T. Nguyen, Jing Zhao, Mark S. Klemens
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Patent number: 6664920Abstract: A cancellation technique embodied in a system and a radar signal processing method that is employed to detect near-range targets. The present invention uses a frequency-modulation continuous-wave (FMCW) or stepped frequency waveform and is capable of detecting near-range targets that would normally be obscured by transmitter leakage and internal reflections. This cancellation technique works by transmitting one or more reference ramp signals and then subtracting the coherent average of the transmitted reference ramp signals from a group of succeeding transmitted and received ramp return -signals. The resulting group of FM ramp return signals is noncoherently integrated to achieve more stable target detection statistics. More particularly, the present technique implements the following processing steps. Generating a predetermined number of reference ramp signals. Coherently averaging target return signals corresponding to transmitted reference ramp signals to produce a reference average signal.Type: GrantFiled: November 18, 1993Date of Patent: December 16, 2003Assignee: Raytheon CompanyInventors: Charles J. Mott, Trung T. Nguyen, Edmond E. Griffin, II
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Patent number: 6529162Abstract: A system and technique for phased array antenna beam steering for transmitting and receiving without sending the waveform through an actual (physical) time delay when a time varying frequency is used as the waveform. The inventive system is adapted for use with an antenna having an array of radiating elements and includes a plurality of signal sources. Each source is adapted to provide a signal having a predetermined frequency offset signal for an associated radiating element or set of radiating elements. For transmit a plurality of first mixers is provided. Each of the first mixers is coupled to receive an excitation signal as a first input and the output from a respective one of the sources as a second input. The output of each mixer is coupled to a respective subset of the antenna radiating elements. In effect, each of the sources provides a virtual time delay.Type: GrantFiled: May 17, 2001Date of Patent: March 4, 2003Inventors: Irwin L. Newberg, Oleg Brovko, Steve I. Hsu, Robert A. Kosmala, Trung T. Nguyen, Ricardo Rico, Jr.
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Publication number: 20020175859Abstract: A system and technique for phased array antenna beam steering for transmitting and receiving without sending the waveform through an actual (physical) time delay when a time varying frequency is used as the waveform. The inventive system is adapted for use with an antenna having an array of radiating elements and includes a plurality of signal sources. Each source is adapted to provide a signal having a predetermined frequency offset signal for an associated radiating element or set of radiating elements. For transmit a plurality of first mixers is provided. Each of the first mixers is coupled to receive an excitation signal as a first input and the output from a respective one of the sources as a second input. The output of each mixer is coupled to a respective subset of the antenna radiating elements. In effect, each of the sources provides a virtual time delay.Type: ApplicationFiled: May 17, 2001Publication date: November 28, 2002Inventors: Irwin L. Newberg, Oleg Brovko, Steve I. Hsu, Robert A. Kosmala, Trung T. Nguyen, Ricardo Rico
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Patent number: 5872959Abstract: The present invention concerns a method for eliminating or reducing clock skew introduced by differing signal propagation delays across a data bus. At high bus clock frequencies the time delay differences caused by path length differences can be catastrophic and must be eliminated by expensive layout techniques. An input/output (I/O) architecture is proposed here which tailors a delay to each individual data line, and thereby aligns all the incoming data. Furthermore, a clock signal is provided to indicate the optimal data sampling time. In the described embodiment, this circuit enables the transmission of four 32 bit words in parallel in one clock cycle of a 250 MHz processor.Type: GrantFiled: September 10, 1996Date of Patent: February 16, 1999Assignee: LSI Logic CorporationInventors: Trung T. Nguyen, Henry Yang, Randy E. Bach, Kevin Daberkow
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Patent number: 5742252Abstract: An apparatus for reducing the computational requirements for resolving ambiguity in interferometer measurements where the interferometer elements are arranged arbitrarily. Each of a plurality of interferometer elements each measures the phase of the incoming electromagnetic signal. The interferometer elements are each separated by lengths defined as baselines, which are sorted and processed in ascending order. Following initialization, for each baseline (92, 108), the phase measurements of the next baseline (92, 108) to be processed are estimated. If the measured phases (94-100, 110-118) of the next baseline (92, 108) falls within a predetermined range (104, 106) of the estimated phases, the phase is retained for estimating the phases of the next baseline. After a sufficient number of baselines have been processed, the angle of the incoming electromagnetic signal may be determined in accordance with the retained phases.Type: GrantFiled: August 26, 1996Date of Patent: April 21, 1998Assignee: Raytheon CompanyInventors: Trung T. Nguyen, Loan Taree Bui
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Patent number: 5600284Abstract: A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing.Type: GrantFiled: October 16, 1995Date of Patent: February 4, 1997Assignee: LSI Logic CorporationInventors: Trung T. Nguyen, Jin Zhao
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Patent number: 5469120Abstract: A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing.Type: GrantFiled: December 7, 1994Date of Patent: November 21, 1995Assignee: LSI Logic CorporationInventors: Trung T. Nguyen, Jin Zhao
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Patent number: 5191337Abstract: A maximum likelihood estimator and range-only-initialization target detection method employed to detect and resolve targets in a multislope linear frequency modulated waveform radar. The method resolves a large number of target returns without a large amount of signal processing and without creating a significant number of false alarms, or ghosts. The method simultaneously estimates range and doppler for each target. The method rejects undesired long-range targets that fold into target regions, and processes target regions of interest around a nearest target to reduce signal processing throughput requirements. Using a K out of N detection rule, the method detects targets that compete with mainlobe rain clutter, mainlobe ground clutter, and receiver leakage. The method simultaneously estimates target parameters and optimally resolves any number of targets.Type: GrantFiled: February 25, 1992Date of Patent: March 2, 1993Assignee: Hughes Aircraft CompanyInventors: Oleg Brovko, Trung T. Nguyen