Abstract: This document describes a passive thermal-control system that can be integrated into an electronic speaker device and associated electronic speaker devices. The passive thermal-control system uses an architecture that combines heat spreaders and thermal interface materials to transfer heat from heat-generating electronic devices of the electronic speaker device to a housing component of the electronic speaker device. The housing component dissipates the heat to prevent a thermal runaway condition.

Abstract: This document describes a passive thermal-control system that can be integrated into an electronic speaker device and associated electronic speaker devices. The passive thermal-control system uses an architecture that combines heat spreaders and thermal interface materials to transfer heat from heat-generating electronic devices of the electronic speaker device to a housing component of the electronic speaker device. The housing component dissipates the heat to prevent a thermal runaway condition.

Abstract: This document describes a passive thermal-control system that can be integrated into an electronic speaker device and associated electronic speaker devices. The passive thermal-control system uses an architecture that combines heat spreaders and thermal interface materials to transfer heat from heat-generating electronic devices of the electronic speaker device to a housing component of the electronic speaker device. The housing component dissipates the heat to prevent a thermal runaway condition.

Abstract: A semiconductor package substrate for assembling an integrated circuit chip operable at fast ramp rate signals and clock rates, comprising an insulating support having a region for attaching said chip; a pattern of electrical interconnections, disposed on said substrate in one metallization level and operable for transmitting waveforms; and a low pass filter for removing unwanted high frequency components from said transmitted waveforms, comprising a network of inductors and capacitors formed within said one metallization level and positioned substantially within said substrate region for chip attachment.