Abstract: The present disclosure describes ultrasound systems configured to enhance flow imaging and analysis by adaptively adjusting one or more imaging parameters in response to acquired flow measurements. Example systems can include an ultrasound transducer and one or more processors. Using the system components, mean flow velocity magnitude and acceleration can be determined within a target region during an acquisition phase, which may include a cardiac cycle. One or more adjusted flow imaging parameters, such as adjusted ensemble length, temporal smoothing filter length and/or step size, can be determined based on the acquired flow measurements to increase the signal quality of newly acquired ultrasound echo signals. The adjusted flow imaging parameters can then be applied by the ultrasound transducer during a second acquisition phase.

Abstract: Front-end circuitry for an ultrasound system comprises a beamformer FPGA integrated circuit, transmit ICs with both pulse transmitters and linear waveform transmitters and T/R switches, transmit control and receiver ICs, and analog-to-digital converter (ADC) ICs. Only the transmit ICs require high voltages, and the transmit/receive switches are integrated in the transmit ICs, isolating the receiver ICs from high voltages. The transmitters can be trimmed to adjust the pulse rise and fall rates, enabling the transmission of pulses with low harmonic frequency content and thus better harmonic images.

Abstract: Front-end circuitry for an ultrasound system is described which comprises a beamformer FPGA integrated circuit, transmit ICs with both pulse transmitters and linear waveform transmitters, transmit control and receiver ICs, and analog-to-digital converter (ADC) ICs. Waveform data for both the linear and pulser transmitters is stored in the transmit control and receiver ICs, saving pins on the FPGA, which is the conventional source of this data. The ADCs couple digital echo data to the FPGA for beamforming over serial bus lines, saving additional FPGA pins over a conventional parallel data arrangement. The inclusion of both pulser and linear waveform transmit capabilities in the transmit ICs enables the use of both types of transmitters in the formation of a multi-mode image, such as use of the pulsers for Doppler beams and linear transmitters for B mode beams in the formation of a colorflow image.

Abstract: Front-end circuitry for an ultrasound system comprises a beamformer FPGA integrated circuit, transmit ICs with both pulse transmitters and linear waveform transmitters and T/R switches, transmit control and receiver ICs, and analog-to-digital converter (ADC) ICs. Only the transmit ICs require high voltages, and the transmit/receive switches are integrated in the transmit ICs, isolating the receiver ICs from high voltages. The transmitters can be trimmed to adjust the pulse rise and fall rates, enabling the transmission of pulses with low harmonic frequency content and thus better harmonic images.

Abstract: Front-end circuitry for an ultrasound system is described which comprises a beamformer FPGA integrated circuit, transmit ICs with both pulse transmitters and linear waveform transmitters, transmit control and receiver ICs, and analog-to-digital converter (ADC) ICs. Waveform data for both the linear and pulser transmitters is stored in the transmit control and receiver ICs, saving pins on the FPGA, which is the conventional source of this data. The ADCs couple digital echo data to the FPGA for beamforming over serial bus lines, saving additional FPGA pins over a conventional parallel data arrangement. The inclusion of both pulser and linear waveform transmit capabilities in the transmit ICs enables the use of both types of transmitters in the formation of a multi-mode image, such as use of the pulsers for Doppler beams and linear transmitters for B mode beams in the formation of a colorflow image.