Patents by Inventor Tsachi Weiser

Tsachi Weiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device with secure test mode
    Patent number: 9471413
    Abstract: A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.
    Type: Grant
    Filed: January 24, 2016
    Date of Patent: October 18, 2016
    Assignee: WINBOND ELECTRONICS CORPORATION
    Inventors: Nir Tasher, Uri Kaluzhny, Tsachi Weiser, Valery Teper
  • MEMORY DEVICE WITH SECURE TEST MODE
    Publication number: 20160139976
    Abstract: A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.
    Type: Application
    Filed: January 24, 2016
    Publication date: May 19, 2016
    Inventors: Nir Tasher, Uri Kaluzhny, Tsachi Weiser, Valery Teper
  • Memory device with secure test mode
    Patent number: 9318221
    Abstract: A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: April 19, 2016
    Assignee: Winbound Electronics Corporation
    Inventors: Nir Tasher, Uri Kaluzhny, Tsachi Weiser, Valery Teper
  • State-machine clock tampering detection
    Patent number: 9223960
    Abstract: An apparatus for detecting tampering with a clock of a state-machine, comprising, a master state-machine having master states and driven by a master clock, the master states being switchable responsive to events, and an auxiliary state-machine having auxiliary states and driven by an auxiliary clock synchronous with the master clock, the auxiliary states being switchable responsive to a signal generated based at least on said events, consequently establishing a correspondence between the master states and the auxiliary states, thus ensuing that subsequent to tampering with the master clock the correspondence between the master states and the auxiliary states become discordant, thereby indicating that the master clock has been tampered with.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: December 29, 2015
    Assignee: WINBOND ELECTRONICS CORPORATION
    Inventors: Uri Kaluzhny, Tsachi Weiser, Valery Teper, Nir Tasher
  • MEMORY DEVICE WITH SECURE TEST MODE
    Publication number: 20150287477
    Abstract: A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 8, 2015
    Applicant: Winbond Electronics Corporation
    Inventors: Nir Tasher, Uri Kaluzhny, Tsachi Weiser, Valery Teper