Abstract: Briefly, a method and apparatus of detecting and correcting soft error in a way of a ways group of a cache bank The detection of the soft error may be done by comparing between two replicas of the ways groups. The correction may be done by copying data from one replica of the ways group to another replica of the way group.

Abstract: Briefly, a cache memory and a portable apparatus including a cache memory is provided. The cache memory may include one or more banks, wherein each of said banks is partitioned into two or more portions and each of said portions may be powered independently of other of said portions.

Abstract: An apparatus includes an embedded memory, a plurality of input connectors to receive input signals from an external source, a plurality of output connectors to provide output signals to the external source, and a plurality of reconfigurable input and output signal paths coupled to the embedded memory and the plurality of input and output connectors. When the apparatus is operating in a first operating mode, the plurality of reconfigurable input and output signal paths provide the input signals directly to and the output signals directly from the embedded memory.

Abstract: Method and apparatus for characterization of a self timed circuit in an integrated circuit such as a sense amplifier in a memory. A software controlled testability feature is added to the integrated circuit permitting the sense amplifier to be enabled earlier in time following word line activation. In particular, a replacement timing circuit activated by a falling clock edge causes the sense amplifier enable signal to become clock frequency sensitive. The clock frequency is software controlled and parity checking provides a failure detection mechanism. A plurality of the integrated circuit are tested to provide the characterization.