Abstract: A touch display panel is provided and includes a substrate, a plurality of gate lines, a plurality of data lines, a plurality of data output lines, a plurality of thin film transistors, and a plurality of detection capacitors. The gate lines are disposed on the substrate. The data lines are disposed on the substrate. The data lines and the gate lines define a plurality of pixel regions on the substrate. The data output lines are disposed on the substrate, and each data output line is disposed next to one data line. The thin film transistors are respectively disposed in the pixel regions. Each thin film transistor is electrically connected to the corresponding gate line and the corresponding data line. The detection capacitors are respectively disposed in the pixel regions. Each detection capacitor is electrically connected to the corresponding gate line and the corresponding data line.

Abstract: An exemplary method for fabricating an LTPS-TFT substrate is as follows. In step S1, a p-Si pattern including a source electrode contact region and a drain electrode contact region of a first type TFT, a source electrode contact region and a drain electrode contact region of a second type TFT is formed. In step S2, the source electrode contact region and the drain electrode contact region of the first type TFT are heavily doped with a first dopant. In step S3, gate electrodes of the first and the second type TFT are formed. In step S4, the source electrode contact regions and drain electrode contact regions of the first and second type TFTs are heavily doped with a second dopant. The first dopant and the second dopant are compensative, and the number ratio of the first dopant to the second dopant is approximately 2 to 1.

Abstract: A touch display panel is provided and includes a substrate, a plurality of gate lines, a plurality of data lines, a plurality of data output lines, a plurality of thin film transistors, and a plurality of detection capacitors. The gate lines are disposed on the substrate. The data lines are disposed on the substrate. The data lines and the gate lines define a plurality of pixel regions on the substrate. The data output lines are disposed on the substrate, and each data output line is disposed next to one data line. The thin film transistors are respectively disposed in the pixel regions. Each thin film transistor is electrically connected to the corresponding gate line and the corresponding data line. The detection capacitors are respectively disposed in the pixel regions. Each detection capacitor is electrically connected to the corresponding gate line and the corresponding data line.

Abstract: An exemplary method for fabricating an LTPS-TFT substrate is as follows. In step S1, a p-Si pattern including a source electrode contact region and a drain electrode contact region of a first type TFT, a source electrode contact region and a drain electrode contact region of a second type TFT is formed. In step S2, the source electrode contact region and the drain electrode contact region of the first type TFT are heavily doped with a first dopant. In step S3, gate electrodes of the first and the second type TFT are formed. In step S4, the source electrode contact regions and drain electrode contact regions of the first and second type TFTs are heavily doped with a second dopant. The first dopant and the second dopant are compensative, and the number ratio of the first dopant to the second dopant is approximately 2 to 1.