Patents by Inventor TSAI-SHENG LO

TSAI-SHENG LO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11442210
    Abstract: A polarizer substrate includes a substrate, a reflective layer, and a metal pattern layer. The reflective layer is located on the substrate and has a transmission area and a reflective area. The metal pattern layer is located on the reflective layer and the substrate. The metal pattern layer includes a polarizer structure and a microstructure. The polarizer structure includes a plurality of grid lines overlapping the transmission area. A thickness of each of the grid lines is 200 nm to 500 nm, a width of each of the grid lines is 30 nm to 70 nm, and a distance between each adjacent two of the grid lines is 30 nm to 70 nm. The microstructure overlaps the reflective area, and a thickness of the microstructure is 20 nm to 500 nm.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 13, 2022
    Assignee: Au Optronics Corporation
    Inventors: Sheng-Kai Lin, Chia-Hsin Chung, Tsai-Sheng Lo, Sheng-Ming Huang, Ming-Jui Wang, Chih-Chiang Chen, Hui-Ku Chang, Cheng-Chan Wang, Chia-Po Lin, Jen-Kuei Lu
  • Patent number: 11392003
    Abstract: An active device substrate including a substrate, first metal grid wires, a first transparent conductive layer, a gate insulating layer, a semiconductor layer, a source, and a drain is provided. The first metal grid wires are located on the substrate. The first transparent conductive layer includes a scan line and a gate connected to the scan line. The scan line and/or the gate is directly connected to at least a part of the first metal grid wires. The gate insulating layer is located on the first transparent conductive layer. The semiconductor layer is located on the gate insulating layer and overlapped with the gate. The source and the drain are electrically connected to the semiconductor layer.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: July 19, 2022
    Assignee: Au Optronics Corporation
    Inventors: Cheng-Chan Wang, Tsai-Sheng Lo, Chia-Hsin Chung, Chih-Chiang Chen, Hui-Ku Chang, Sheng-Kai Lin, Chia-Po Lin, Ming-Jui Wang, Sheng-Ming Huang, Jen-Kuei Lu
  • Patent number: 11181769
    Abstract: A polarizer substrate includes a substrate, an organic planarization layer, an inorganic buffer layer, and a plurality of strip-shaped polarizer structures. The organic planarization layer is located on the substrate. The inorganic buffer layer is located on the organic planarization layer. The inorganic buffer layer has a plurality of trenches located on a first surface. The trenches do not penetrate through the inorganic buffer layer. The strip-shaped polarizer structures are located on the first surface of the inorganic buffer layer. Each of the trenches is located between two adjacent polarizer structures. A display panel is also provided.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: November 23, 2021
    Assignee: Au Optronics Corporation
    Inventors: Tsai-Sheng Lo, Chih-Chiang Chen, Ming-Jui Wang, Sheng-Kai Lin, Sheng-Ming Huang, Chia-Hsin Chung, Hui-Ku Chang, Wei-Chi Wang, Jen-Kuei Lu
  • Publication number: 20210255379
    Abstract: A polarizer substrate includes a substrate, a reflective layer, and a metal pattern layer. The reflective layer is located on the substrate and has a transmission area and a reflective area. The metal pattern layer is located on the reflective layer and the substrate. The metal pattern layer includes a polarizer structure and a microstructure. The polarizer structure includes a plurality of grid lines overlapping the transmission area. A thickness of each of the grid lines is 200 nm to 500 nm, a width of each of the grid lines is 30 nm to 70 nm, and a distance between each adjacent two of the grid lines is 30 nm to 70 nm. The microstructure overlaps the reflective area, and a thickness of the microstructure is 20 nm to 500 nm.
    Type: Application
    Filed: July 20, 2020
    Publication date: August 19, 2021
    Applicant: Au Optronics Corporation
    Inventors: Sheng-Kai Lin, Chia-Hsin Chung, Tsai-Sheng Lo, Sheng-Ming Huang, Ming-Jui Wang, Chih-Chiang Chen, Hui-Ku Chang, Cheng-Chan Wang, Chia-Po Lin, Jen-Kuei Lu
  • Publication number: 20210248341
    Abstract: A photosensitive device includes a display panel, a photosensitive element substrate, and a first quarter wave plate. The photosensitive element substrate is located on the back of the display panel. The photosensitive element substrate includes a first substrate, a plurality of first light emitting diodes, a plurality of photosensitive elements, and a first polarizer structure. The first light emitting diodes and the photosensitive elements are located on the first substrate. The first polarizer structure is located on the first light emitting diodes and the photosensitive elements. The first quarter wave plate is located between the first polarizer structure and the display panel.
    Type: Application
    Filed: July 21, 2020
    Publication date: August 12, 2021
    Applicant: Au Optronics Corporation
    Inventors: Chia-Po Lin, Tsai-Sheng Lo, Chih-Chiang Chen, Sheng-Ming Huang, Sheng-Kai Lin, Ming-Jui Wang, Chia-Hsin Chung, Hui-Ku Chang, Cheng-Chan Wang, Jen-Kuei Lu
  • Publication number: 20210247652
    Abstract: An active device substrate including a substrate, first metal grid wires, a first transparent conductive layer, a gate insulating layer, a semiconductor layer, a source, and a drain is provided. The first metal grid wires are located on the substrate. The first transparent conductive layer includes a scan line and a gate connected to the scan line. The scan line and/or the gate is directly connected to at least a part of the first metal grid wires. The gate insulating layer is located on the first transparent conductive layer. The semiconductor layer is located on the gate insulating layer and overlapped with the gate. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: July 24, 2020
    Publication date: August 12, 2021
    Applicant: Au Optronics Corporation
    Inventors: Cheng-Chan Wang, Tsai-Sheng Lo, Chia-Hsin Chung, Chih-Chiang Chen, Hui-Ku Chang, Sheng-Kai Lin, Chia-Po Lin, Ming-Jui Wang, Sheng-Ming Huang, Jen-Kuei Lu
  • Patent number: 11054740
    Abstract: An imprint mold and a method for manufacturing the same are provided. The imprint mold includes a plurality of substantially identical or different mold patterns, wherein there isn't any height difference between the mold patterns.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 6, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Sheng-Ming Huang, Sheng-Kai Lin, Chih-Chiang Chen, Hui-Ku Chang, Chia-Hsin Chung, Wei-Chi Wang, Ming-Jui Wang, Jen-Kuei Lu, Tsai-Sheng Lo, Huang-Kai Shen
  • Patent number: 10802189
    Abstract: A wire grid polarizer and a display panel using the same are provided. The wire grid polarizer includes a substrate, a plurality of wire grids, a plurality of patterned light absorbing layers, and a surface covering layer. The plurality of wire grids are disposed on the substrate, wherein there are a plurality of gaps between every two wire grids. The plurality of patterned light absorbing layers are disposed corresponding to and overlapping the wire grids respectively, wherein every two of the patterned light absorbing layers have one of the gaps. The surface covering layer is disposed on the patterned light absorbing layers and directly contacts the patterned light absorbing layers.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 13, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Huang-Kai Shen, Sheng-Ming Huang, Jen-Kuei Lu, Chih-Chiang Chen, Hui-Ku Chang, Tsai-Sheng Lo, Chia-Hsin Chung, Wei-Chi Wang, Sheng-Kai Lin, Ming-Jui Wang
  • Publication number: 20200133061
    Abstract: A polarizer substrate includes a substrate, an organic planarization layer, an inorganic buffer layer, and a plurality of strip-shaped polarizer structures. The organic planarization layer is located on the substrate. The inorganic buffer layer is located on the organic planarization layer. The inorganic buffer layer has a plurality of trenches located on a first surface. The trenches do not penetrate through the inorganic buffer layer. The strip-shaped polarizer structures are located on the first surface of the inorganic buffer layer. Each of the trenches is located between two adjacent polarizer structures. A display panel is also provided.
    Type: Application
    Filed: May 9, 2019
    Publication date: April 30, 2020
    Applicant: Au Optronics Corporation
    Inventors: Tsai-Sheng Lo, Chih-Chiang Chen, Ming-Jui Wang, Sheng-Kai Lin, Sheng-Ming Huang, Chia-Hsin Chung, Hui-Ku Chang, Wei-Chi Wang, Jen-Kuei Lu
  • Publication number: 20200103572
    Abstract: A polarizer substrate and manufacturing method thereof are provided. The polarizer substrate includes a substrate, a plurality of polarizer structures, a plurality of barrier structures, and a passivation layer. The polarizer structures are disposed on the substrate. Each of the polarizer structures includes a wire-grid and a capping structure disposed on the wire-grid. The barrier structures are disposed on the capping structures and not contacting with the side walls of the wire-grids. A gap between two adjacent barrier structures is smaller than a gap between two adjacent wire-grids. The passivation layer is disposed on the barrier structures.
    Type: Application
    Filed: May 14, 2019
    Publication date: April 2, 2020
    Applicant: Au Optronics Corporation
    Inventors: Wei-Chi Wang, Chih-Chiang Chen, Tsai-Sheng Lo, Sheng-Kai Lin, Chia-Hsin Chung, Hui-Ku Chang, Ming-Jui Wang, Sheng-Ming Huang, Jen-Kuei Lu
  • Publication number: 20190094435
    Abstract: A wire grid polarizer and a display panel using the same are provided. The wire grid polarizer includes a substrate, a plurality of wire grids, a plurality of patterned light absorbing layers, and a surface covering layer. The plurality of wire grids are disposed on the substrate, wherein there are a plurality of gaps between every two wire grids. The plurality of patterned light absorbing layers are disposed corresponding to and overlapping the wire grids respectively, wherein every two of the patterned light absorbing layers have one of the gaps. The surface covering layer is disposed on the patterned light absorbing layers and directly contacts the patterned light absorbing layers.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 28, 2019
    Inventors: HUANG-KAI SHEN, SHENG-MING HUANG, JEN-KUEI LU, CHIH-CHIANG CHEN, HUI-KU CHANG, TSAI-SHENG LO, CHIA-HSIN CHUNG, WEI-CHI WANG, SHENG-KAI LIN, MING-JUI WANG
  • Publication number: 20190079394
    Abstract: An imprint mold and a method for manufacturing the same are provided. The imprint mold includes a plurality of substantially identical or different mold patterns, wherein there isn't any height difference between the mold patterns.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 14, 2019
    Inventors: SHENG-MING HUANG, SHENG-KAI LIN, CHIH-CHIANG CHEN, HUI-KU CHANG, CHIA-HSIN CHUNG, WEI-CHI WANG, MING-JUI WANG, JEN-KUEI LU, TSAI-SHENG LO, HUANG-KAI SHEN