Patents by Inventor Tsai-Yang Jea

Tsai-Yang Jea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9037805
    Abstract: A method for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.
    Type: Grant
    Filed: November 28, 2013
    Date of Patent: May 19, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsai-Yang Jea, Zhi Zhang
  • Patent number: 9003124
    Abstract: A system or computer usable program product for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Zhi Zhang
  • Publication number: 20150081862
    Abstract: Administering group identifiers of processes in a parallel computer includes each process in a set of processes, receiving from a compute node of the plurality of compute nodes, a request to establish the set of processes as an operational group including receiving a list of process identifiers for each process of the set of processes. Embodiments also include each process generating without communication amongst the processes, a unique group identifier in dependence upon the list of process identifiers.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 19, 2015
    Applicant: International Business Machines Corporation
    Inventors: CHARLES J. ARCHER, TSAI-YANG JEA, CHULHO KIM
  • Patent number: 8959528
    Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: February 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
  • Patent number: 8954991
    Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
  • Publication number: 20140282612
    Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
  • Patent number: 8805952
    Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Yuan Yuan Nie
  • Patent number: 8751600
    Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: June 10, 2014
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Yang Jea, Yuan Yuan Nie
  • Publication number: 20140089601
    Abstract: A method for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.
    Type: Application
    Filed: November 28, 2013
    Publication date: March 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsai-Yang Jea, Zhi Zhang
  • Patent number: 8625861
    Abstract: Techniques for generating a gradient characterization for a first fingerprint image are provided. One or more fingerprint feature points are selected from the first fingerprint image. A region is obtained for each of the one or more selected fingerprint feature points. The region is a representation of an area proximate a given fingerprint feature point. Each of the obtained regions is divided into a plurality of sub-regions. A histogram is generated for each of the plurality of sub-regions. For each of the one or more selected fingerprint feature points, the one or more generated histograms are combined into a concatenated histogram. The concatenated histogram is used for identification purposes.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gaurav Aggarwal, Rudolf Maarten Bolle, Tsai-Yang Jea, Nalini Kanta Ratha
  • Patent number: 8607199
    Abstract: A technique for debugging code during runtime includes providing, from an outside process, a trigger to a daemon. In this case, the trigger is associated with a registered callback function. The trigger is then provided, from the daemon, to one or more designated tasks of a job. The registered callback function (that is associated with the trigger) is then executed by the one or more designated tasks. Execution results of the executed registered callback function are then returned (from the one or more designated tasks) to the daemon.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: December 10, 2013
    Assignee: International Business Machines Corporation
    Inventors: Chulho Kim, Hanhong Xue, Tsai-Yang Jea, Hung Q. Thai
  • Publication number: 20130247069
    Abstract: In a parallel computer executing a parallel application, where the parallel computer includes a number of compute nodes, with each compute node including one or more computer processors, the parallel application including a number of processes, and one or more of the processes executing a barrier operation, creating a checkpoint of a parallel application includes: maintaining, by each computer processor, global barrier operation state information, the global barrier operation state information includes an aggregation of each process's barrier operation state information; invoking, for each process of the parallel application, a checkpoint handler; saving, by each process's checkpoint handler as part of a checkpoint for the parallel application, the process's barrier operation state information; and exiting, by each process, the checkpoint handler.
    Type: Application
    Filed: March 15, 2012
    Publication date: September 19, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wen Chen, Tsai-Yang Jea, William P. Lepera, Serban C. Maerean, Hung Q. Thai, Hanhong Xue, Zhi Zhang
  • Publication number: 20130232262
    Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.
    Type: Application
    Filed: April 5, 2013
    Publication date: September 5, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: UMAN CHAN, DERYCK X. HONG, TSAI-YANG JEA, CHULHO KIM, ZENON J. PIATEK, HUNG Q. THAI, ABHINAV VISHNU, HANHONG XUE
  • Publication number: 20130173738
    Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 4, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsai-Yang Jea, Yuan Yuan Nie
  • Publication number: 20130151789
    Abstract: A method, system or computer usable program product for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 13, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsai-Yang Jea, Zhi Zhang
  • Publication number: 20130152101
    Abstract: A job may be divided into multiple tasks that may execute in parallel on one or more compute nodes. The tasks executing on the same compute node may be coordinated using barrier synchronization. However, to perform barrier synchronization, the tasks use (or attach) to a barrier synchronization register which establishes a common checkpoint for each of the tasks. A leader task may use a shared memory region to publish to follower tasks the location of the barrier synchronization register—i.e., a barrier synchronization register ID. The follower tasks may then monitor the shared memory to determine the barrier synchronization register ID. The leader task may also use a count to ensure all the tasks attach to the BSR. This advantageously avoids any task-to-task communication which may reduce overhead and improve performance.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 13, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsai-Yang Jea, William P. LePera, Hanhong Xue, Zhi Zhang
  • Patent number: 8452888
    Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: May 28, 2013
    Assignee: International Business Machines Corporation
    Inventors: Uman Chan, Deryck X Hong, Tsai-Yang Jea, Chulho Kim, Zenon J Piatek, Hung Q Thai, Abhinav Vishnu, Hanhong Xue
  • Patent number: 8249314
    Abstract: A biometric representation of a fingerprint from which the original biometric cannot be recovered (privacy) and which can be canceled and reissued. For example, based on an individual's token, the representation can be scrambled uniquely to the individual. From the scrambled biometric representation it is not feasible to reconstruct the biometric and if the representation is compromised, a new one is easily issued. In another aspect, if a biometric can be represented by some other one-dimensional structure, a distance or similarity measure is defined to compare biometrics. Verification decisions can be made based on the distance between or similarity of biometrics.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: August 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Rudolf M. Bolle, Jonathan H. Connell, Tsai-Yang Jea, Nalini K. Ratha
  • Patent number: 8135911
    Abstract: A method, system, and computer program product are provided for managing a cache. A region to be stored within the cache is received. The cache includes multiple regions and each of the regions is defined by memory ranges having a starting index and an ending index. The region that has been received is stored in the cache in accordance with a cache invariant. The cache invariant guarantees that at any given point in time the regions in the cache are stored in a given order and none of the regions are completely contained within any other of the regions.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: March 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Uman Chan, Deryck X. Hong, Tsai-Yang Jea, Hanhong Xue
  • Publication number: 20120023304
    Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: UMAN CHAN, DERYCK X. HONG, TSAI-YANG JEA, CHULHO KIM, ZENON J. PIATEK, HUNG Q. THAI, ABHINAV VISHNU, HANHONG XUE