Patents by Inventor Tsailai Terry Wu

Tsailai Terry Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7333106
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a Z-buffer memory. The apparatus also includes a set of bits, each of which corresponds to a block of the Z-buffer memory. The apparatus also includes an initialization (init) register. The apparatus also includes control logic coupled to the Z-buffer memory, the set of bits, and the init register. The control logic sets the set of bits upon receipt of an initialization request. The control logic retrieves a Z value from either the init register or from the Z-buffer memory according to the states of the set of bits.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: February 19, 2008
    Assignee: Silicon Motion, Inc.
    Inventors: Tsailai Terry Wu, Ming Chen
  • Patent number: 6937242
    Abstract: A 3-D graphics chip includes independent internal DRAM buffers each having a wide bandwidth access bus for connection to a 3-D texture rendering drawing engine. The 3-D drawing engine takes advantage of a flexible embedded memory interface to reduce the traditional 3-D pipeline delay by a factor of 3. In a specific embodiment, each of three drawing processes—texture, Z, pixel—retrieves and stores information in a separate embedded drawing buffer via separate wide bandwidth access busses. Access to an external memory is provided via a separate external access bus. In another specific embodiment, the 3-D drawing engine accesses the embedded drawing buffers via read and write FIFO's to maximize the drawing process throughput.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: August 30, 2005
    Assignee: Silicon Motion, Inc.
    Inventors: Tsailai Terry Wu, Yudianto Halim
  • Publication number: 20040201590
    Abstract: A 3-D graphics chip includes independent internal DRAM buffers each having a wide bandwidth access bus for connection to a 3-D texture rendering drawing engine. The 3-D drawing engine takes advantage of a flexible embedded memory interface to reduce the traditional 3-D pipeline delay by a factor of 3. In a specific embodiment, each of three drawing processes—texture, Z, pixel—retrieves and stores information in a separate embedded drawing buffer via separate wide bandwidth access busses. Access to an external memory is provided via a separate external access bus. In another specific embodiment, the 3-D drawing engine accesses the embedded drawing buffers via read and write FIFO's to maximize the drawing process throughput.
    Type: Application
    Filed: March 8, 2004
    Publication date: October 14, 2004
    Inventors: Tsailai Terry Wu, Yudianto Halim
  • Patent number: 6704023
    Abstract: A 3-D graphics chip includes independent internal DRAM buffers each having a wide bandwidth access bus for connection to a 3-D texture rendering drawing engine. The 3-D drawing engine takes advantage of a flexible embedded memory interface to reduce the traditional 3-D pipeline delay by a factor of 3. In a specific embodiment, each of three drawing processes—texture, Z, pixel—retrieves and stores information in a separate embedded drawing buffer via separate wide bandwidth access busses. Access to an external memory is provided via a separate external access bus. In another specific embodiment, the 3-D drawing engine accesses the embedded drawing buffers via read and write FIFO's to maximize the drawing process throughput.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: March 9, 2004
    Assignee: Silicon Motion, Inc.
    Inventors: Tsailai Terry Wu, Yudianto Halim
  • Patent number: 6518972
    Abstract: A 3-D graphics chip includes independent internal DRAM buffers each having a wide bandwidth access bus for connection to a 3-D texture rendering drawing engine. The 3-D drawing engine takes advantage of a flexible embedded memory interface to reduce the traditional 3-D pipeline delay by a factor of 3. In a specific embodiment, each of three drawing processes—texture, Z, pixel—retrieves and stores information in a separate embedded drawing buffer via separate wide bandwidth access busses. Access to an external memory is provided via a separate external access bus. In another specific embodiment, the 3-D drawing engine accesses the embedded drawing buffers via read and write FIFO's to maximize the drawing process throughput.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: February 11, 2003
    Assignee: Silicon Motion, Inc.
    Inventors: Tsailai Terry Wu, Yudianto Halim
  • Patent number: 6329997
    Abstract: A 3-D graphics chip includes independent internal DRAM buffers each having a wide bandwidth access bus for connection to a 3-D texture rendering drawing engine. The 3-D drawing engine takes advantage of a flexible embedded memory interface to reduce the traditional 3-D pipeline delay by a factor of 3. In a specific embodiment, each of three drawing processes—texture, Z, pixel—retrieves and stores information in a separate embedded drawing buffer via separate wide bandwidth access busses. Access to an external memory is provided via a separate external access bus. In another specific embodiment, the 3-D drawing engine accesses the embedded drawing buffers via read and write FIFO's to maximize the drawing process throughput.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: December 11, 2001
    Assignee: Silicon Motion, Inc.
    Inventors: Tsailai Terry Wu, Yudianto Halim