Patents by Inventor Tsan-Hsien Chen

Tsan-Hsien Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10410942
    Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: September 10, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tsan-Hsien Chen, Ian Hu, Jin-Feng Yang, Shih-Wei Chen, Hui-Chen Hsu
  • Publication number: 20190164859
    Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.
    Type: Application
    Filed: November 27, 2017
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsan-Hsien CHEN, Ian HU, Jin-Feng YANG, Shih-Wei CHEN, Hui-Chen HSU
  • Patent number: 7964949
    Abstract: A tenon-and-mortise packaging structure including a carrier and a chip is provided. The carrier has a top surface and a lower surface opposite to the top surface. The top surface forms at least one tenon projection, and the lower surface forms a mortise slot corresponding to the tenon projection in shape, size, and position, so that two carriers can be stacked on and jointed to each other by coupling the tenon projection to the corresponding mortise slot. The tenon projection and the mortise slot have conduction portions, respectively. When the tenon projection and the mortise slot are engaged with each other, the conduction portions are electrically connected with each other. At least one chip is embedded in the carrier. The chip has an active surface and a back side respectively and electrically connected with the top and the lower surfaces of the carrier.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: June 21, 2011
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Hsiao-Chuan Chang, Tsan-Hsien Chen
  • Publication number: 20090096077
    Abstract: A tenon-and-mortise packaging structure including a carrier and a chip is provided. The carrier has a top surface and a lower surface opposite to the top surface. The top surface forms at least one tenon projection, and the lower surface forms a mortise slot corresponding to the tenon projection in shape, size, and position, so that two carriers can be stacked on and jointed to each other by coupling the tenon projection to the corresponding mortise slot. The tenon projection and the mortise slot have conduction portions, respectively. When the tenon projection and the mortise slot are engaged with each other, the conduction portions are electrically connected with each other. At least one chip is embedded in the carrier. The chip has an active surface and a back side respectively and electrically connected with the top and the lower surfaces of the carrier.
    Type: Application
    Filed: July 9, 2008
    Publication date: April 16, 2009
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Hsiao-Chuan Chang, Tsan-Hsien Chen