Patents by Inventor TSAN-LIEN YEH

TSAN-LIEN YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9831197
    Abstract: Provided is a wafer-level package with metal shielding structure and the manufacturing method for producing the same. The wafer-level package includes first conductive structures for securing a die unit to a substrate, and is featured by disposing one or more second conductive structures that are located at the front surface of the die unit and proximate to a side surface of the die unit. The second conductive structure does not electrically connected to the internal circuitry of the die unit. After the wafer is cut, a metal shielding layer is formed on the back surface and the side surfaces of the die unit. Afterwards, the die unit is mounted on the substrate to allow the second conductive structure to connect to the ground structure on the substrate and connect to the metal shielding layer. Thus, EMI shielding function is generated to efficiently suppress EMI and miniaturize the package.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: November 28, 2017
    Assignee: Sigurd Microelectronics Corp.
    Inventors: Tsan-Lien Yeh, Kuan-Tien Shen, Szu-Chuan Pang, Wei-Ping Wang
  • Publication number: 20160207762
    Abstract: A sensor package structure and method is characterized in connecting a sensor with a circuit substrate in a flip chip bonding method to enhance the structure strength and miniaturize the product; using a no-flow underfill glue to fill the gap between the sensor and the circuit substrate to protect the contacts of the flip chip structure, prevent the performance from being affected by the overflowing encapsulant, and promote the reliability of products. The present invention uses the no-flow underfill glue process to replace the processes of forming a dam and a soft protection layer and thus simplifies the fabrication process and reduces the fabrication cost.
    Type: Application
    Filed: January 20, 2015
    Publication date: July 21, 2016
    Inventors: CHIH-WEI LU, KUAN-TIEN SHEN, TSAN-LIEN YEH
  • Publication number: 20120025211
    Abstract: The present invention discloses a compact sensor package structure, which comprises a package body, an LED chip and a sensor chip. The package body has a first room, a second room, a first hole and a second hole. The first and second rooms are independent to each other. The first and second holes interconnect the interiors and the external environments of the first and second rooms. The LED chip is arranged inside the first room, corresponding to the first hole and below the first hole. The LED chip projects light through the first hole. The sensor chip is arranged inside the second room, corresponding to the second hole and above/below the second hole. The sensor chip receives light via the second hole. The present invention features two independent rooms for two chips and prevents interference between the two chips.
    Type: Application
    Filed: July 6, 2011
    Publication date: February 2, 2012
    Applicant: SIGURD MICROELECTRONICS CORP.
    Inventors: TSAN-LIEN YEH, WAN-HUA WU, SZU-CHUAN PANG, CHI-CHANG WU, MING-HUNG HUNG