Abstract: A semiconductor device includes a controller circuit and a signal generating circuit. The controller circuit is coupled to a plurality of memory devices and configured to generate a plurality of chip enable signals. One of the chip enable signals is provided to one of the memory devices, so as to respectively enable the corresponding memory device. The signal generating circuit is disposed outside of the controller circuit and configured to receive the chip enable signals and generate a termination circuit enable signal according to the chip enable signals. The termination circuit enable signal is provided to the memory devices. When a state of any of the chip enable signals is set to an enabled state, a state of the termination circuit enable signal generated by the signal generating circuit is set to an enabled state.

Abstract: An index grating of an optical encoder provided by the invention has a main technical feature of increasing a ratio of light-transmissible area of a grating per unit area, thereby increasing a light source utilization efficiency and a signal intensity, and reducing light-blocking ratio caused by dust and other foreign matters, thereby reducing a degree of influence on light intensity, so as to improve a sensing precision of the optical encoder.

Abstract: An integrated circuit includes a plurality of control circuits and a resource controller. Each of the control circuits is configured to send a work request, execute a work procedure according to an authorization code corresponding to the work procedure, and generate a completion signal after the work procedure is completed. The resource controller includes a storage circuit stores a plurality of index values; a processor circuit updates, according to each of the completion signals, a status of the index value associated with the authorization code corresponding to the work procedure; and a conversion circuit configured to, in response to each of the work requests, output, when a status of at least one of the index values is resource-available, an authorization code associated with one index value whose status is resource-available.

Abstract: An index grating of an optical encoder provided by the invention has a main technical feature of increasing a ratio of light-transmissible area of a grating per unit area, thereby increasing a light source utilization efficiency and a signal intensity, and reducing light-blocking ratio caused by dust and other foreign matters, thereby reducing a degree of influence on light intensity, so as to improve a sensing precision of the optical encoder.

Abstract: A read data sorting method and a storage device are provided. The read data sorting method includes: receiving a read command to read multiple logic block addresses (LBAs), wherein the LBAs are continuous; initializing an address counter as an initial logic block address of the LBAs; storing a first logic block address in a sorting buffer and set a tag corresponding to the first logic block address as valid when a first data corresponding to the first logic block address of the LBAs is transmitted to the data buffer; and transmitting a second data corresponding to a second logic block address to a host and accumulating the address counter when the tag corresponding to the second logic block address of the LBAs in the sorting buffer is valid and the second logic block address equals to the address counter.

Abstract: An optical positioning measurement device includes a light source module operable to emit light, an encoder module and a sensor module. The sensor module is configured to output electric signals relating to luminous flux of light received thereby via the encoder module. The encoder module having a first incremental code portion, a second incremental code portion and an absolute code portion. The first incremental code portion includes multiple first incremental code patterns that are equally distributed. The second incremental code portion includes multiple second incremental code patterns that are equally distributed. The second incremental code patterns are arranged more loosely than the first incremental code patterns.

Abstract: An optical encoder with modified pattern and control method for higher precision is provided. The optical encoder comprises a light emitting element, a code wheel, a grating disk and a light sensing element. The code wheel is disposed at one side of the light emitting element and comprises a plurality of tracks configured in the annular formation periodically. The grating disk is disposed at one side of the code wheel opposite to the light emitting element, and comprises a plurality of patterns parallel with each other. The light sensing element is disposed at one side of the grating disk opposite to the code wheel, and comprises a control unit and a plurality of sensing units corresponding to the patterns. The light sensing element comprises a plurality of sensing arrays wherein each of the sensing arrays comprises at least two sensing units, and the sensing units with identical space are connected with the same transmission line.

Abstract: A read data sorting method and a storage device are provided. The read data sorting method includes: receiving a read command to read multiple logic block addresses (LBAs), wherein the LBAs are continuous; initializing an address counter as an initial logic block address of the LBAs; storing a first logic block address in a sorting buffer and set a tag corresponding to the first logic block address as valid when a first data corresponding to the first logic block address of the LBAs is transmitted to the data buffer; and transmitting a second data corresponding to a second logic block address to a host and accumulating the address counter when the tag corresponding to the second logic block address of the LBAs in the sorting buffer is valid and the second logic block address equals to the address counter.

Abstract: A command processing method and a storage controller are provided. The command processing method is adapted for the storage controller. The storage controller includes a processor and peripherals. The command processing method includes: disposing a first command buffer and a second command buffer in the processor; disposing a synchronizer in the storage controller, the synchronizer changing a value of a flag at a predetermined interval to set the first command buffer or the second command buffer valid; and when the first command buffer is valid and the processor issues a command, the processor temporarily stores the command in the first command buffer and one of the peripherals accesses the command in the first command buffer to executes a corresponding operation.

Abstract: An optical positioning measurement device includes a light source module operable to emit light, an encoder module and a sensor module. The sensor module is configured to output electric signals relating to luminous flux of light received thereby via the encoder module. The encoder module having a first incremental code portion, a second incremental code portion and an absolute code portion. The first incremental code portion includes multiple first incremental code patterns that are equally distributed. The second incremental code portion includes multiple second incremental code patterns that are equally distributed. The second incremental code patterns are arranged more loosely than the first incremental code patterns.

Abstract: A command processing method and a storage controller are provided. The command processing method is adapted for the storage controller. The storage controller includes a processor and peripherals. The command processing method includes: disposing a first command buffer and a second command buffer in the processor; disposing a synchronizer in the storage controller, the synchronizer changing a value of a flag at a predetermined interval to set the first command buffer or the second command buffer valid; and when the first command buffer is valid and the processor issues a command, the processor temporarily stores the command in the first command buffer and one of the peripherals accesses the command in the first command buffer to executes a corresponding operation.

Abstract: In one aspect, the present disclosure provides a storage device for accounting for transmission errors to improve a usable life span of memory blocks. In some embodiments, the storage device includes: a memory array including a plurality of memory blocks; and a memory controller in communication with the memory array via an interface, wherein the memory controller is configured to detect an error event associated with data from one of the plurality of memory blocks; determine an origin of the error event; increment an error count if the origin of the error event indicates a data error in the one of the plurality of memory blocks and not if the origin of the error event indicates a transmission error; compare the error count to a threshold value; and mark the one of the plurality of memory blocks as bad when the error count exceeds the threshold value.

Abstract: Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Abstract: Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Abstract: Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Abstract: In one aspect, the present disclosure provides a storage device for accounting for transmission errors to improve a usable life span of memory blocks. In some embodiments, the storage device includes: a memory array including a plurality of memory blocks; and a memory controller in communication with the memory array via an interface, wherein the memory controller is configured to detect an error event associated with data from one of the plurality of memory blocks; determine an origin of the error event; increment an error count if the origin of the error event indicates a data error in the one of the plurality of memory blocks and not if the origin of the error event indicates a transmission error; compare the error count to a threshold value; and mark the one of the plurality of memory blocks as bad when the error count exceeds the threshold value.

Abstract: A flash memory controller includes a controllable delay circuit configured to receive a read strobe signal from a flash memory device and to delay the read strobe signal, a data latch, coupled to the controllable delay circuit, configured to receive the delayed read strobe signal, and to capture data from the flash memory device using the delayed read strobe signal, and a calibration circuit coupled to the controllable delay circuit, configured to instruct the controllable delay circuit to delay the read strobe signal at one of a plurality of delay settings, to receive the captured data from the data latch, to determine an accuracy of the captured data, and to determine an adjustment factor for the controllable delay circuit based on the accuracy of the data captured at the data latch.

Abstract: This invention relates to a method and apparatus for controlling the length of a carbon nanotube, in cooperation with a substrate having at least one reference level on a surface of the substrate on which at least one carbon nanotube is formed, comprising at least one positioning platform for mounting and calibrating the substrate; a discharging electrode mounted on one side of the positioning platform to cut the carbon nanotube wherein the position of the discharging electrode can be calibrated with the positioning platform; a piezoelectric actuator for calibrating the position of the discharging electrode or the height of the discharging electrode relative to the substrate reference level; a position sensor for detection of the height of the substrate; and a voltage pulse supplying means for applying a voltage pulse to the discharging electrode to cut the carbon nanotube.

Abstract: This invention relates to a method and apparatus for controlling the length of a carbon nanotube, in cooperation with a substrate having at least one reference level on a surface of the substrate on which at least one carbon nanotube is formed, comprising at least one positioning platform for mounting and calibrating the substrate; a discharging electrode mounted on one side of the positioning platform to cut the carbon nanotube wherein the position of the discharging electrode can be calibrated with the positioning platform; a piezoelectric actuator for calibrating the position of the discharging electrode or the height of the discharging electrode relative to the substrate reference level; a position sensor for detection of the height of the substrate; and a voltage pulse supplying means for applying a voltage pulse to the discharging electrode to cut the carbon nanotube.

Abstract: A high access rate flash control provided for accessing more than one flash memory chip having different access timing specifications is disclosed. The controller comprises a read/write(R/W) pulse generator, a R/W delay chain circuit, a sampling delay chain circuit, a bi-directional feedback pad (PAD1), a data bus sampler, and a second pad (PAD 2). In an embodiment, the flash controller using a fix clock to generate synchronized Read/Write pulse which is then appropriated adjusted by the R/W delay chain circuit to provide optimum R/W control signal. The adjusted R/W signal is than outputted by a bi-directional pad to flash memory chips. With the external signal feedback function, the bi-directional pad has associated with the sampling delay chain, the time latency due to pads can be eliminated nearly. Thus, the flash controller can approach high rate to access flash chips.