Patents by Inventor Tsang-Sheng CHANG

Tsang-Sheng CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9299679
    Abstract: The present invention discloses a high reliability semiconductor package structure, which includes a lower heat sink, a die, an upper heat sink, a lead frame and a package body. The lead frame and the upper heat sink contain separately a first bending unit and a second bending unit that are electrically connected. The upper and lower heat sinks are attached to two opposite surfaces of the die and sink the high power transient heat generated at the die. The lower heat sink also has an indentation that circles the die and contains extra solder that might otherwise contaminate the die. Package body contains and protects the die, the upper and lower heat sinks and the lead frame. With the implementation of the invention, the reliability of the semiconductor package structure is promoted and the EMC durability together with the operable power is enhanced.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: March 29, 2016
    Assignee: Anova Technologies Co., Ltd.
    Inventors: Wei-Li Yang, Tsung-Chieh Chou, Tzu-Chiang Wang, I, Tsang-Sheng Chang
  • Publication number: 20150243587
    Abstract: The present invention discloses a high reliability semiconductor package structure, which includes a lower heat sink, a die, an upper heat sink, a lead frame and a package body. The lead frame and the upper heat sink contain separately a first bending unit and a second bending unit that are electrically connected. The upper and lower heat sinks are attached to two opposite surfaces of the die and sink the high power transient heat generated at the die. The lower heat sink also has an indentation that circles the die and contains extra solder that might otherwise contaminate the die. Package body contains and protects the die, the upper and lower heat sinks and the lead frame. With the implementation of the invention, the reliability of the semiconductor package structure is promoted and the EMC durability together with the operable power is enhanced.
    Type: Application
    Filed: June 11, 2014
    Publication date: August 27, 2015
    Inventors: Wei-Li YANG, Tsung-Chieh CHOU, Tzu-Chiang WANG, I, Tsang-Sheng CHANG