Patents by Inventor Tse Min Chu

Tse Min Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8416576
    Abstract: An integrated circuit card includes a laminate, solder bumps, a die and a package. The laminate includes a core board sandwiched between two conductive layers. The conductive layers are connected to each other with solder bumps filled in apertures defined in the core board. The die is provided on one of the conductive layers. The package is provided on the die and an area of the conductive layer around the die.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: April 9, 2013
    Assignee: Aflash Technology Co., Ltd.
    Inventors: Tse Min Chu, Jimmy Liang
  • Patent number: 8129274
    Abstract: Disclosed is a method for making an aperture in a carrier and electrically connecting two opposite faces of the carrier. At first, a carrier is provided. Secondly, a heater is provided for heating a portion of the carrier in an environment rich in oxygen, thus making an aperture in the carrier and forming an isolative layer on the wall of the aperture synchronously. Finally, the aperture is filled with a conductive material.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: March 6, 2012
    Assignee: Aflash Technology Co., Ltd.
    Inventor: Tse Min Chu
  • Publication number: 20110291291
    Abstract: Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus, fabrication is made easy and cost is reduced.
    Type: Application
    Filed: March 7, 2011
    Publication date: December 1, 2011
    Applicant: MAO BANG ELECTRONIC CO., LTD.
    Inventors: Tung-Sheng Lai, Tse Min Chu
  • Publication number: 20110228487
    Abstract: An integrated circuit card includes a laminate, solder bumps, a die and a package. The laminate includes a core board sandwiched between two conductive layers. The conductive layers are connected to each other with solder bumps filled in apertures defined in the core board. The die is provided on one of the conductive layers. The package is provided on the die and an area of the conductive layer around the die.
    Type: Application
    Filed: June 9, 2010
    Publication date: September 22, 2011
    Applicant: MAO BANG ELECTRONIC CO., LTD.
    Inventors: Tse Min Chu, Jimmy Liang
  • Publication number: 20110057318
    Abstract: A die is packaged. The package of the die has a line groove filled with a conductive material. A metal pad is exposed out of a solder mask. And the metal pad is connected with a die pad on the die through the line groove in a deflective way. In this way, a wiring space of a wafer is efficiently used; and a manufacturing yield of the wafer is enhanced.
    Type: Application
    Filed: January 15, 2009
    Publication date: March 10, 2011
    Applicant: MAO BANG ELECTRONIC CO., LTD.
    Inventors: Sung Chuan MA, Tse Min Chu