Patents by Inventor TSENG-HUA TUNG

TSENG-HUA TUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11287867
    Abstract: A power sequence monitoring system is disclosed, and comprises: a microprocessor and a control module. The microprocessor comprises a first conversion unit and a second conversion unit. The first conversion unit is used for converting a power-on signal received from a power management chip to a first digital signal, and the second conversion unit is adopted for converting a power-off signal received form the power management chip to a second digital signal. After receiving the first digital signal and the second digital signal from the microprocessor, and the control module outputs a plurality of power monitoring data to an electronic device, such that a user easily knows the power signal state of the host computer by the system of the present invention.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 29, 2022
    Assignee: LANNER ELECTRONICS INC.
    Inventors: Pu-Sung Lin, Tseng-Hua Tung, Yi-Hsien Liu, Chien-Hsun Lin, Chang-Ting Liu
  • Publication number: 20210173464
    Abstract: A system for visualizing power signal sequence is disclosed, and comprises: a microprocessor and a control module. The microprocessor comprises a first conversion unit and a second conversion unit. The first conversion unit is used for converting a power-on signal received from a power management chip to a first digital signal, and the second conversion unit is adopted for converting a power-off signal received form the power management chip to a second digital signal. After receiving the first digital signal and the second digital signal from the microprocessor, and the control module outputs a plurality of power monitoring data to an electronic device, such that a user easily knows the power signal state of the host computer by the system of the present invention.
    Type: Application
    Filed: June 5, 2020
    Publication date: June 10, 2021
    Inventors: PU-SUNG LIN, TSENG-HUA TUNG, YI-HSIEN LIU, CHIEN-HSUN LIN, CHANG-TING LIU