Patents by Inventor Tseng-Yao PAN

Tseng-Yao PAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978768
    Abstract: A method manufacturing of a semiconductor structure including following steps is provided. A material layer is provided. A first mask layer is formed on the material layer. Core patterns are formed on the first mask layer. A spacer material layer is conformally formed on the core patterns. An etch-back process is performed on the spacer material layer. A portion of the spacer material layer located on two ends of the core pattern is removed, then spacer structures are formed. Each spacer structure includes a merged spacer and a non-merged spacer. The core patterns are removed. The first patterned mask layer is formed to cover a portion of the merged spacer and expose another portion of the merged spacer and the non-merged spacer. The first patterned mask layer and the spacer structure are used as a mask, and the first mask layer is patterned into a second patterned mask layer.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: May 7, 2024
    Assignee: Winbond Electronics Corp.
    Inventors: Tseng-Yao Pan, Chien-Hsiang Yu, Ching-Yung Wang, Cheng-Hong Wei, Ming-Tsang Wang
  • Publication number: 20230317781
    Abstract: A method manufacturing of a semiconductor structure including following steps is provided. A material layer is provided. A first mask layer is formed on the material layer. Core patterns are formed on the first mask layer. A spacer material layer is conformally formed on the core patterns. An etch-back process is performed on the spacer material layer. A portion of the spacer material layer located on two ends of the core pattern is removed, then spacer structures are formed. Each spacer structure includes a merged spacer and a non-merged spacer. The core patterns are removed. The first patterned mask layer is formed to cover a portion of the merged spacer and expose another portion of the merged spacer and the non-merged spacer. The first patterned mask layer and the spacer structure are used as a mask, and the first mask layer is patterned into a second patterned mask layer.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 5, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Tseng-Yao Pan, Chien-Hsiang Yu, Ching-Yung Wang, Cheng-Hong Wei, Ming-Tsang Wang
  • Patent number: 11721720
    Abstract: A semiconductor structure includes a trunk portion and a branch portion. The trunk portion extends in a first direction. The branch portion is connected to the trunk portion. The branch portion includes a handle portion and a two-pronged portion. The handle portion is connected to the trunk portion and extends in a second direction. The second direction intersects the first direction. The two-pronged portion is connected to the handle portion. A line width of the handle portion is greater than a line width of the two-pronged portion.
    Type: Grant
    Filed: March 21, 2021
    Date of Patent: August 8, 2023
    Assignee: Winbond Electronics Corp.
    Inventors: Tseng-Yao Pan, Chien-Hsiang Yu, Ching-Yung Wang, Cheng-Hong Wei, Ming-Tsang Wang
  • Publication number: 20220302254
    Abstract: A semiconductor structure includes a trunk portion and a branch portion. The trunk portion extends in a first direction. The branch portion is connected to the trunk portion. The branch portion includes a handle portion and a two-pronged portion. The handle portion is connected to the trunk portion and extends in a second direction. The second direction intersects the first direction. The two-pronged portion is connected to the handle portion. A line width of the handle portion is greater than a line width of the two-pronged portion.
    Type: Application
    Filed: March 21, 2021
    Publication date: September 22, 2022
    Applicant: Winbond Electronics Corp.
    Inventors: Tseng-Yao Pan, Chien-Hsiang Yu, Ching-Yung Wang, Cheng-Hong Wei, Ming-Tsang Wang
  • Publication number: 20210398858
    Abstract: A method for forming a semiconductor structure includes: forming an active layer on a substrate; forming hard masks on the active layer, wherein a first spacing is disposed between two closely spaced hard masks in a predetermined word line region nearest to a predetermined selective gate region, wherein the first spacing is less than a second spacing between any two of the hard masks other than the two closely spaced hard masks; forming spacers on the sidewalls of the hard masks, wherein two spacers on opposite sides of the sidewalls of the closely spaced hard masks merge into a combined spacer; and transferring the patterns of the spacers to the active layer to form word lines. The step of transferring the patterns of the spacers includes transferring the pattern of the combined spacer to the active layer to form a first word line.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 23, 2021
    Inventors: Tseng-Yao PAN, Chien-Hsiang YU, Hung-Sheng CHEN, Ching-Yung WANG, Cheng-Hong WEI