Patents by Inventor Tsi-Pin Choong

Tsi-Pin Choong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8022991
    Abstract: A system and method for three-axis stabilization of focal plane data. The system and method include performing a two-dimensional vertical shear transformation and a two-dimensional horizontal shear transformation. The system and method further incorporate a SIMD computer architecture and an array of addressable processing elements that process the field-of-view for a target image received by a focal plane array of detector elements. Each processing element includes a calculation device that calculates the row and column address of virtual pixels for a virtual field-of-view. The system and method further include a plurality of memory modules configured to store data in a plurality of addressable storage locations by column and row, and each memory module is identified with a different processing element. A dedicated memory routing network for the processing elements and memory modules permits the exchange of information between processing elements and memory modules associated with each processing element.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: September 20, 2011
    Assignee: Lockheed Martin Corporation
    Inventors: Henry C. Kancler, Tsi-Pin Choong, Barry A. Wealand, Leon K. Wood, Katarina Van Heusen, John T. Reagan, Theodore J. Mills, Michael A. Levin
  • Patent number: 7511738
    Abstract: A system and method for three-axis stabilization of focal plane data. The system and method include performing a two-dimensional vertical shear transformation and a two-dimensional horizontal shear transformation. The system and method further incorporate a SIMD computer architecture and an array of addressable processing elements that process the field-of-view for a target image received by a focal plane array of detector elements. Each processing element includes a calculation device that calculates the row and column address of virtual pixels for a virtual field-of-view. The system and method further include a plurality of memory modules configured to store data in a plurality of addressable storage locations by column and row, and each memory module is identified with a different processing element. A dedicated memory routing network for the processing elements and memory modules permits the exchange of information between processing elements and memory modules associated with each processing element.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 31, 2009
    Assignee: Lockheed Martin Corporation
    Inventors: Henry C. Kancler, Tsi-Pin Choong, Barry A. Wealand, Leon K. Wood, Katarina Van Heusen, John T. Reagan, Theodore J. Mills, Michael A. Levin
  • Publication number: 20030195006
    Abstract: The present invention includes a smart vocoder which selects an optimal vocoder algorithm for encoding a communication. The selection is based on at least one of the following criteria: a) minimizing bandwidth required to transmit the communication; b) minimizing a cost of transmitting the communication; c) increasing the quality of the communication; d) achieving compatibility with a receiving terminal; and e) reducing latency. The selection of the optimal vocoder algorithm occurs during the call setup. The smart vocoder can select a low bit rate vocoder algorithm if bandwidth is scarce. The smart vocoder can also select a vocoder algorithm which allows the call to be routed over a low cost network. A lossless compressor can be used to compress the encoded communication signal, creating extra bandwidth for the insert of error correction bits. The smart vocoder can be incorporated into a DSP or one or more ASICs.
    Type: Application
    Filed: October 16, 2001
    Publication date: October 16, 2003
    Inventors: Philip T. Choong, Tsi-Pin Choong
  • Patent number: 4512179
    Abstract: A microprocessor controls pressure transducer testing, calibration, and adjustment. A transducer or unit under test (UUT) receives a fluid pressure signal from a test line, and outputs a corresponding electrical signal. A test pressure is output from a fluid pressure module which is connected to the UUT. A human operator is interrogated by the microprocessor based control unit as to (1) identifying details about the desired pressure UUT to be tested, and (2) the anticipated electrical range to be encountered in reply to an applied test pressure. The microprocessor then sequentially generates electrical output signals which are sent to the test lines to generate the test pressure pulses from a fluid pressure supply. The pressure test pulses are delivered to the UUT. As the UUT receives the sequence of pressure test pulses, the microprocessor records the output electrical signals generated by the UUT, and compares them to an internal reference pressure transducer output.
    Type: Grant
    Filed: October 28, 1983
    Date of Patent: April 23, 1985
    Assignee: General Electric Company
    Inventors: Don G. Umble, Tsi-Pin Choong, Kenneth R. Izzo, Charles E. Burdg, Gary H. Hankin, Charles A. Dalke