Abstract: Techniques for an integrated circuit device with planar bond pads are provided. A metal layer region is formed on a substrate. The integrated circuit device also includes a passivation layer that has an opening formed around the metal layer region. The passivation layer and a top surface of the metal layer region defines a continuous planar surface. An under bump metallurgy structure, sized and positioned to completely overlay the top surface of the metal layer region, is coupled to the continuous planar surface. The under bump metallurgy structure is coupled to a bump termination electrode. Preferably, a top surface of the bump termination electrode has a maximum surface nonuniformity of less than about 1 micron.

Abstract: Techniques for manufacturing a bond pad structure are provide. A method includes providing a substrate. A metal pad and passivation layer are formed over the substrate. The passivation layer includes an opening to expose a portion of the metal pad. A first film is deposited at least over the exposed portion of the metal pad. A second film is deposited over the first film. A photoresist layer is deposited over the substrate, and a trench is formed in the photoresist layer directly over the portion of the metal pad. A first layer is electroplated in the trench over the second film, and a barrier layer is electroplated in trench over the first layer. A termination electrode, comprising tin, is electroplated in the trench over the barrier layer. The photoresist layer is removed. In addition, the method can include etching to remove the second film and first film beyond a predetermined area. The termination electrode is then reflowed.