Patents by Inventor Tsu-Chun KUO

Tsu-Chun KUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR STRUCTURE HAVING VERTICLE CONDUCTIVE GRAPHENE AND METHOD FOR FORMING THE SAME
    Publication number: 20230378067
    Abstract: A semiconductor structure includes a substrate, a dielectric layer, and a graphene conductive structure. The dielectric layer is disposed on the substrate, and has an inner lateral surface that is perpendicular to the substrate. The graphene conductive structure is formed in the dielectric layer and has at least one graphene layer extending in a direction parallel to the inner lateral surface of the dielectric layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsu-Chun KUO, Shin-Yi YANG, Yu-Chen CHAN, Shu-Wei LI, Meng-Pei LU, Ming-Han LEE
  • INTERCONNECT STRUCTURE INCLUDING SINGLE LAYER SERVING AS BOTH BARRIER LAYER AND LINER LAYER
    Publication number: 20230352409
    Abstract: A semiconductor device includes a substrate and an interconnect layer disposed on the substrate. The interconnect layer includes a dielectric layer and an interconnect extending through the dielectric layer. The interconnect includes a bulk metal region and a single barrier/liner layer, which serves as both a barrier layer and a liner layer and which is disposed to separate the bulk metal region from the dielectric layer.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Pei LU, Shin-Yi YANG, Ching-Fu YEH, Chin-Lung CHUNG, Cian-Yu CHEN, Yun-Chi CHIANG, Tsu-Chun KUO, Ming-Han LEE
  • SEMICONDUCTOR STRUCTURE HAVING VERTICLE CONDUCTIVE GRAPHENE AND METHOD FOR FORMING THE SAME
    Publication number: 20230066891
    Abstract: A semiconductor structure includes a substrate, a dielectric layer, and a graphene conductive structure. The dielectric layer is disposed on the substrate, and has an inner lateral surface that is perpendicular to the substrate. The graphene conductive structure is formed in the dielectric layer and has at least one graphene layer extending in a direction parallel to the inner lateral surface of the dielectric layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsu-Chun KUO, Shin-Yi YANG, Yu-Chen CHAN, Shu-Wei LI, Meng-Pei LU, Ming-Han LEE