Patents by Inventor Tsubasa Harada
Tsubasa Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8552516Abstract: According to one embodiment, a solid state image capture device includes a multilayered interconnect layer, a semiconductor substrate, a pillar diffusion layer and an insulating member. The multilayered interconnect layer includes an interconnect. The semiconductor substrate is provided on the multilayered interconnect layer and the semiconductor substrate has a through-trench. The pillar diffusion layer is formed in the semiconductor substrate around the through-trench. In addition, an insulating member is filled into the through-trench.Type: GrantFiled: July 2, 2010Date of Patent: October 8, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Atsushi Murakoshi, Tsubasa Harada
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Patent number: 7977141Abstract: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and second holes, forming a photodiode in the semiconductor substrate, forming a wiring layer including a connecting part for connecting to the contact and a wiring for connecting to the connecting part, bonding a supporting substrate on the wiring layer, exposing the contact and the alignment mark on the surface of the semiconductor substrate by reducing the semiconductor substrate in thickness, and forming a filter and a lens on the photodiode based on the alignment mark.Type: GrantFiled: August 31, 2009Date of Patent: July 12, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Tsubasa Harada, Atsushi Murakoshi
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Publication number: 20110084350Abstract: According to one embodiment, a solid state image capture device includes a multilayered interconnect layer, a semiconductor substrate, a pillar diffusion layer and an insulating member. The multilayered interconnect layer includes an interconnect. The semiconductor substrate is provided on the multilayered interconnect layer and the semiconductor substrate has a through-trench. The pillar diffusion layer is formed in the semiconductor substrate around the through-trench. In addition, an insulating member is filled into the through-trench.Type: ApplicationFiled: July 2, 2010Publication date: April 14, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Atsushi MURAKOSHI, Tsubasa Harada
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Publication number: 20100181637Abstract: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and second holes, forming a photodiode in the semiconductor substrate, forming a wiring layer including a connecting part for connecting to the contact and a wiring for connecting to the connecting part, bonding a supporting substrate on the wiring layer, exposing the contact and the alignment mark on the surface of the semiconductor substrate by reducing the semiconductor substrate in thickness, and forming a filter and a lens on the photodiode based on the alignment mark.Type: ApplicationFiled: August 31, 2009Publication date: July 22, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsubasa Harada, Atsushi Murakoshi
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Patent number: 7126178Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: GrantFiled: March 2, 2005Date of Patent: October 24, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Publication number: 20060097303Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: ApplicationFiled: December 21, 2005Publication date: May 11, 2006Inventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Patent number: 6982198Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: GrantFiled: March 2, 2005Date of Patent: January 3, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Patent number: 6946699Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: GrantFiled: April 10, 2003Date of Patent: September 20, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Publication number: 20050170582Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: ApplicationFiled: March 2, 2005Publication date: August 4, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Publication number: 20050167720Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: ApplicationFiled: March 2, 2005Publication date: August 4, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao
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Publication number: 20040106254Abstract: A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.Type: ApplicationFiled: April 10, 2003Publication date: June 3, 2004Inventors: Takeo Furuhata, Ichiro Mizushima, Akiko Sekihara, Motoya Kishida, Tsubasa Harada, Takashi Nakao