Patents by Inventor Tsubasa INOUE

Tsubasa INOUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10893616
    Abstract: Disclosed is a production method of a multi-layered printed wiring board, including the following steps 1 to 3: Step 1: a step of laminating, on a substrate with inner layer circuit, a metal foil with adhesive layer including a support, a metal foil having a thickness of 3 ?m or less and ? or less relative to the thickness of the inner layer circuit, and an organic adhesive layer having a thickness of 10 ?m or less in this order, via an organic insulating resin layer such that the organic insulating resin layer and the organic adhesive layer are opposed to each other, and then releasing the support to form a laminated sheet (a) having the metal foil as an outer layer metal foil layer; Step 2: a step of irradiating the laminated sheet (a) with a laser to bore the outer layer metal foil layer, the organic adhesive layer, and the organic insulating resin layer to form a bored laminated sheet (b) having a blind via hole; and Step 3: a step of forming an outer layer circuit connected with the inner layer circui
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: January 12, 2021
    Assignee: Showa Denko Materials Co., Ltd.
    Inventors: Hitoshi Onozeki, Tsubasa Inoue, Katsuji Yamagishi, Hiroshi Shimizu
  • Publication number: 20200388609
    Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.
    Type: Application
    Filed: January 25, 2019
    Publication date: December 10, 2020
    Inventors: Kazuma YOSHIDA, Ryosuke OKAWA, Tsubasa INOUE
  • Publication number: 20200365729
    Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 19, 2020
    Inventors: Ryosuke OKAWA, Toshikazu IMAI, Kazuma YOSHIDA, Tsubasa INOUE, Takeshi IMAMURA
  • Publication number: 20180235090
    Abstract: Disclosed is a production method of a multi-layered printed wiring board, including the following steps 1 to 3: Step 1: a step of laminating, on a substrate with inner layer circuit, a metal foil with adhesive layer including a support, a metal foil having a thickness of 3 ?m or less and ? or less relative to the thickness of the inner layer circuit, and an organic adhesive layer having a thickness of 10 ?m or less in this order, via an organic insulating resin layer such that the organic insulating resin layer and the organic adhesive layer are opposed to each other, and then releasing the support to form a laminated sheet (a) having the metal foil as an outer layer metal foil layer; Step 2: a step of irradiating the laminated sheet (a) with a laser to bore the outer layer metal foil layer, the organic adhesive layer, and the organic insulating resin layer to form a bored laminated sheet (b) having a blind via hole; and Step 3: a step of forming an outer layer circuit connected with the inner layer circui
    Type: Application
    Filed: August 10, 2016
    Publication date: August 16, 2018
    Inventors: Hitoshi ONOZEKI, Tsubasa INOUE, Katsuji YAMAGISHI, Hiroshi SHIMIZU