Abstract: First to fourth input buffers stores cells inputted from first to fourth input ports, respectively. Each input buffer is equipped with a main buffer section, a plurality of sub-buffer sections connected to the main buffer section in series and a buffer controller for controlling them. A collision judging section judges whether or not a collision occurs between the cells outputted from each sub-buffer section, and the judged result is sent to a cell converter. The cell converter returns a collision information to the buffer controller in accordance with the judged result, and further sends a cell, which has a victory information since it is judged as a victory over the collision, through a sorter to a self-routing section. The self-routing section outputs the received cell to an output port. This configuration enables a shuffle operation to be carried out in the sub-buffer section and the cell converter to thereby avoid the drop of the throughput.

Abstract: In a policing apparatus, a cell receiving unit receives cells to temporarily store the received cells and performs a policing violation process to each of the received cells as a reception cell based on a result of policing violation determination to the reception cell. A cell data storing section has a cell data storing table for circularly storing a cell identification data of the reception cell, and a subscriber data storing section has a subscriber data storing table for storing a management data necessary for the policing violation determination, for every cell identification data. A control unit refers to the subscriber data storing table based on the cell identification data of the reception cell each time the reception cell is received to read out the management data, and performs the policing violation determination to the reception cell based on the read out management data and an address pointer value for the reception cell.

Abstract: To provide an ATM transfer system of data packets wherein transmission efficiency is improved by reducing useless occupation of the ATM network capacity; each of telephones (A and B) sends out a first and a second data packet destined to each of telephones (C and D), a network terminal (10) sends out an ATM cell multi-loaded with the first and the second data packet, the transmitter-side exchange (1) duplicates the ATM cell into a first and a second duplicated ATM cell, a receiver-side exchange (2) extracts only the first data packet and sends out a first new ATM cell loaded only with the first data packet while another receiver-side exchange (3) sends out a second new ATM cell loaded only with the second data packet in the same way, and each of network terminals (20 and 30) processes each of the first and the second new ATM cell into each of the first and second data packet to be sent to each of the telephones (C and D).

Abstract: An ATM communication device includes an ATM line termination transmission circuit connected to an ATM network through an ATM line composed of a bundle of a plurality of lines to transmit ATM cells independently for each system, an HIPPI burst transmission circuit to convert HIPPI bursts into H-PDUs, an H-PDU splitting circuit to splitt the H-PDUs into split H-PDUs of a plurality of systems according to the number of lines of the ATM line, and a cell assembling circuit to cellulate the split H-PDUs individually for each system and sending the cells to the ATM line through the ATM line termination transmission circuit.

Abstract: In a credit control method and system, an initial credit value is sent from a receiving-side to a sending-side prior to transferring a packet. Transfer of a packet is started on the sending-side when this credit value is received. On the receiving-side, a new credit value is calculated when the packet is received, and the same number of packets as the number indicated by the calculated new credit value are received and processed. A new credit value is sent to the sending-side whenever receiving buffers whose number equals the preceding new credit value are emptied. On the sending-side, the sum of the new credit value and the initial credit value, whenever the new credit value is received, is stored as a credit value indicating the number of successively transmittable packets. The stored credit value is decremented by one on the sending-side whenever a packet is sent, and packets are continuously transferred until the credit value becomes "0" or there is no more packet to be sent.

Abstract: A cell selection apparatus includes processing circuits, conversion tables, a selector output reference table, conversion circuits, a discrimination section, a selection section, a registration section, and selector circuits. Each processing circuit performs a predetermined process for each cell. Each conversion table stores cell identifiers and process identifiers. The selector output reference table stores circuit identifiers and discrimination information indicating whether each circuit identifier is valid. Each conversion circuit reads out a cell identifier and a process identifier from the conversion table. The discrimination section discriminates whether a circuit identifier corresponding to the readout cell identifier is valid. The selection section selects one processing circuit corresponding to a process type indicated by the readout process identifier.

Abstract: The object of the invention is to provide a method and a circuit for a crosspoint buffer-type self-routing switch circuit in an ATM switch that allows a switch of higher speed and greater efficiency with a more compact hardware construction and without complicated circuit configuration or operation.

Abstract: Header information of a cell received by a cell reception buffer is converted into a numerical value, which is then stored in a header information memory. Simultaneously, the content of a writing pointer is added successively to the contents of the window size registers of a window size register group by an adder whose output data are used as reading data to read header information of cells corresponding to terminal ends of sliding windows from the header information memory. The contents of cell counters corresponding to the read cells are decremented by 1 only if the read header information is not equal to the header information of the received cell and if their window sizes coincide with each other. The content of a cell counter corresponding to the received cell is incremented by 1 only if the read header information is not equal to the header information of the received cell.

Abstract: In an input queuing self-routing switching system, each input buffer generates a reserve bit indicating that a cell of the buffer is a winner of a contention a previous contention cycle. A memory stores sets of path status bits and reads a corresponding set of path status bits for coupling to the input buffers as it receives cell destination addresses and reserve bits therefrom. Each path status bit indicates that a cell of the corresponding buffer is a contention loser if the reserve bit is not received during a subsequent contention cycle, or indicates that the cell is a winner of a contention when the reserve bit is received. Each input buffer is responsive to a contention timing signal for reading the destination address from a cell position identified by a cell pointer, and supplies the retrieved address and the reserve bit to the memory.