Abstract: A temperature sensor is disclosed. In one embodiment, the temperature sensor takes form in an integrated circuit that includes a plurality of first diodes connected in series between a first node and another node, and a plurality of second diodes connected in series between a second node and the other node. The integrated circuit includes a sub circuit coupled to the first and second nodes. The sub circuit the circuit is configured to generate an output voltage that depends on first and second voltages at the first and second nodes, respectively. The integrated circuit includes a first current source for generating a constant first current, wherein the first current or substantially all of the first current passes through the plurality of first diodes. A second current source is also provided on the integrated circuit for generating a constant second current, wherein the second current or substantially all of the second current passes through the plurality of second diodes.

Abstract: A magnetic recording and reproducing apparatus includes a R/W signal processor having a write data generator arranged to be of an interleave system and transmitting/receiving data to/from the R/W amplifier via a plurality of signal lines. In addition, the R/W amplifier has a compound circuit provided for the write data of the interleave system from the R/W signal processor and is formed as an integrated circuit, moreover, a ½ prescaler is provided at the output of the write data generator, making transmitting and receiving write data in NRZI CODE.

Abstract: A magnetic recording and reproducing apparatus includes a R/W signal processor having a write data generator arranged to be of an interleave system and transmitting/receiving data to/from the R/W amplifier via a plurality of signal lines. In addition, the R/W amplifier has a compound circuit provided for the write data of the interleave system from the R/W signal processor and is formed as an integrated circuit, moreover, a ½ prescaler is provided at the output of the write data generator, making transmitting and receiving write data in NRZI CODE.

Abstract: A magnetic recording and reproducing apparatus includes a read/write signal processor having a write data generator arranged to be of an interleave system and transmitting/receiving data to/from the read/write amplifier via a plurality of signal lines. In addition, the read/write amplifier has a compound circuit provided for the write data of the interleave system from the read/write signal processor and is formed as an integrated circuit, moreover, a 1/2 prescaler is provided at the output of the write data generator, transmitting and receiving write data in Non-Return-To-Zero-Interleave CODE.

Abstract: Digital information including a sync data field and a user data field subsequent thereto is read from a storage media as a digital information signal in an analog signal format. The obtained signal is sampled according to a clock signal and is thereby transformed into a digital information signal in a digital format. In the sync data field, the clock signal is synchronized with the digital information signal by an analog PLL circuit. Thereafter, in the user data field, the clock signal is synchronized with the digital information signal by a digital PLL circuit.

Abstract: Reproducing apparatus with an A/D (analog-to-digital) converter, which realizes high-accuracy data sampling, high-speed data transfer, low dissipation power and low cost. PR (partial response) processing is performed by receiving encoded signals, delaying the received signals on the basis of a reference clock, and adding the delayed signals and the received signals in analog signal form. The added signals are converted into digital values on the basis of the reference clock by the A/D converter, and Viterbi decoding is performed on the basis of the converted digital values. Owing to the PR processing which is performed at a stage preceding the A/D converter, a frequency band for the A/D conversion can be lowered, and hence, the high-accuracy data sampling is permitted.

Abstract: A magnetic recording and reproducing apparatus such as a disk drive has a phase locked loop circuit which is less susceptible to an effect of noise of a power supply and ground and reduces a clock jitter. The magnetic recording and reproducing apparatus is compatible to a constant density recording system without increasing a circuit scale and a power consumption and with a small number of IC pins. The phase locked loop circuit of the magnetic recording and reproducing apparatus is provided with two D/A converter circuits to drive a loop filter. It is also provided with a circuit for distributing a reference potential of a voltage controlled oscillator (VCO) and a center frequency of the VCO, a gain of the VCO and a current gain of the D/A converter circuit are changed in linked relation. A reference voltage source is provided such that a center point or one end of the loop filter is connected to the reference voltage eliminating the ground connection.

Abstract: The present invention provides an AD converter which operates at high speed with low power consumption and a magnetic recording/regenerating apparatus using it.The magnetic recording/regenerating apparatus has a current controller for switching the operating current of the comparator of the AD converter and an ADC controller for receiving an instruction of the conversion speed corresponding to the regenerating frequency. When the current controller receives an instruction for decreasing the conversion speed, it puts the operation state of the AD converter into the low power consumption state.

Abstract: The present invention provides an AD converter which operates at high speed with low power consumption and a magnetic recording/regenerating apparatus using the same. The magnetic recording/regenerating apparatus has a current controller for switching the operating current of the comparator of the AD converter and an ADC controller for receiving an instruction of the conversion speed corresponding to the regenerating frequency. When the current controller receives an instruction for decreasing the conversion speed, it puts an operation state of the AD converter into a low power consumption state.