Patents by Inventor TSUI-MEI CHEN
TSUI-MEI CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11527499Abstract: An integrated fan-out structure on a semiconductor die, method of making the same and method of testing the semiconductor die are disclosed. The semiconductor die includes a bond pad and a hole formed in the bond pad, a passivation layer formed over a portion of the bond pad, and a protective layer formed over the hole in the bond pad.Type: GrantFiled: February 4, 2021Date of Patent: December 13, 2022Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Tsui-Mei Chen, Tsung-Jen Liao, Li-Huan Chu, Pei-Haw Tsao
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Publication number: 20220352103Abstract: An integrated fan-out structure on a semiconductor die, method of making the same and method of testing the semiconductor die are disclosed. The semiconductor die includes a bond pad and a hole formed in the bond pad, a passivation layer formed over a portion of the bond pad, and a protective layer formed over the hole in the bond pad.Type: ApplicationFiled: July 19, 2022Publication date: November 3, 2022Inventors: Tsui-Mei CHEN, Tsung-Jen LIAO, Li-Huan CHU, Pei-Haw TSAO
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Publication number: 20220110232Abstract: The current disclosure describes carrier tape systems, which include a cover tape having adhesion areas and non-adhesion areas which are substantially free of adhesive. Methods for supplying semiconductor devices to an apparatus, which in operation, places the semiconductor devices at desired locations are also described. Methods of forming a semiconductor device carrier system are also described.Type: ApplicationFiled: December 17, 2021Publication date: April 7, 2022Inventors: Sung-Sheng CHIU, Pei-Haw TSAO, Tsui-Mei CHEN, Shih-Hsing LIN, Li-Huan CHU
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Patent number: 11240947Abstract: The current disclosure describes carrier tape systems, which include a cover tape having adhesion areas and non-adhesion areas which are substantially free of adhesive. Methods for supplying semiconductor devices to an apparatus, which in operation, places the semiconductor devices at desired locations are also described. Methods of forming a semiconductor device carrier system are also described.Type: GrantFiled: March 4, 2019Date of Patent: February 1, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sung-Sheng Chiu, Pei-Haw Tsao, Tsui-Mei Chen, Shih-Hsing Lin, Li-Huan Chu
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Publication number: 20210343667Abstract: An integrated fan-out structure on a semiconductor die, method of making the same and method of testing the semiconductor die are disclosed. The semiconductor die includes a bond pad and a hole formed in the bond pad, a passivation layer formed over a portion of the bond pad, and a protective layer formed over the hole in the bond pad.Type: ApplicationFiled: February 4, 2021Publication date: November 4, 2021Inventors: Tsui-Mei CHEN, Tsung-Jen LIAO, Li-Huan CHU, Pei-Haw TSAO
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Patent number: 11164764Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: GrantFiled: May 7, 2020Date of Patent: November 2, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen
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Patent number: 11164763Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: GrantFiled: May 7, 2020Date of Patent: November 2, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen
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Patent number: 10879098Abstract: The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.Type: GrantFiled: September 18, 2018Date of Patent: December 29, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen, Yu-Jung Lin, Ju-Min Chen, Sean Lin
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Publication number: 20200266082Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: ApplicationFiled: May 7, 2020Publication date: August 20, 2020Inventors: Tsung-Jen LIAO, Pei-Haw TSAO, Tsui-Mei CHEN
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Publication number: 20200266083Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: ApplicationFiled: May 7, 2020Publication date: August 20, 2020Inventors: Tsung-Jen LIAO, Pei-Haw TSAO, Tsui-Mei CHEN
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Patent number: 10679877Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: GrantFiled: March 28, 2019Date of Patent: June 9, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen
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Publication number: 20200090970Abstract: The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.Type: ApplicationFiled: September 18, 2018Publication date: March 19, 2020Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen, Yu-Jung Lin, Ju-Min Chen, Sean Lin
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Publication number: 20200006098Abstract: The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.Type: ApplicationFiled: March 28, 2019Publication date: January 2, 2020Inventors: Tsung-Jen LIAO, Pei-Haw TSAO, Tsui-Mei CHEN
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Publication number: 20200008330Abstract: The current disclosure describes a carrier tape systems, which include a cover tape having adhesion areas and non-adhesion areas which are substantially free of adhesive. Methods for supplying semiconductor devices to an apparatus, which in operation, places the semiconductor devices at desired locations are also described. Methods of forming a semiconductor device carrier system are also described.Type: ApplicationFiled: March 4, 2019Publication date: January 2, 2020Inventors: Sung-Sheng CHIU, Pei-Haw TSAO, Tsui-Mei CHEN, Shih-Hsing LIN, Li-Huan CHU
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Patent number: 10283424Abstract: Packaging method and wafer structures are described. A semiconductor wafer having dies, scribe streets surrounding the dies and between the dies and test pads in the scribe streets is provided. Wafer testing is performed to the semiconductor wafer through the test pads. A laser grooving process is performed to the semiconductor wafer along the scribe streets and the test pads in the scribe streets are removed to form laser scanned regions in the scribe streets. A mechanical dicing process is performed cutting through the semiconductor wafer along the scribe streets to singulate the dies. The singulated dies are packaged.Type: GrantFiled: March 8, 2018Date of Patent: May 7, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsui-Mei Chen, Pei-Haw Tsao, Cheng-Te Lin, Yu-Jung Lin, Li-Huan Chu
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Patent number: 9880220Abstract: According to an exemplary embodiment, a method of detecting edge cracks in a die under test is provided. The method includes the following operations: receiving a command signal; providing power from the command signal; providing a response signal based on the command signal; and self-destructing based on the command signal.Type: GrantFiled: August 23, 2016Date of Patent: January 30, 2018Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Huang-Ting Hsiao, An-Tai Xu, Pei-Haw Tsao, Cheng-Hung Tsai, Tsui-Mei Chen, Nai-Cheng Lu
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Publication number: 20160356846Abstract: According to an exemplary embodiment, a method of detecting edge cracks in a die under test is provided. The method includes the following operations: receiving a command signal; providing power from the command signal; providing a response signal based on the command signal; and self-destructing based on the command signal.Type: ApplicationFiled: August 23, 2016Publication date: December 8, 2016Inventors: HUANG-TING HSIAO, AN-TAI XU, PEI-HAW TSAO, CHENG-HUNG TSAI, TSUI-MEI CHEN, NAI-CHENG LU
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Patent number: 9454684Abstract: According to an exemplary embodiment, a method of detecting edge cracks in a die under test is provided. The method includes the following operations: receiving a command signal; providing power from the command signal; providing a response signal based on the command signal; and self-destructing based on the command signal.Type: GrantFiled: May 28, 2014Date of Patent: September 27, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Huang-Ting Hsiao, An-Tai Xu, Pei-Haw Tsao, Cheng-Hung Tsai, Tsui-Mei Chen, Nai-Cheng Lu
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Publication number: 20150347793Abstract: According to an exemplary embodiment, a method of detecting edge cracks in a die under test is provided. The method includes the following operations: receiving a command signal; providing power from the command signal; providing a response signal based on the command signal; and self-destructing based on the command signal.Type: ApplicationFiled: May 28, 2014Publication date: December 3, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: HUANG-TING HSIAO, AN-TAI XU, PEI-HAW TSAO, CHENG-HUNG TSAI, TSUI-MEI CHEN, NAI-CHENG LU