Patents by Inventor Tsui Ping Chu
Tsui Ping Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120639Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.Type: ApplicationFiled: August 10, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
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Patent number: 10026734Abstract: A MOS device assembly having at least two transistors, each transistor having a gate region. The dimensions of the gate region of the first transistor are different from the dimensions of the gate region of the second transistor. The transconductance of the MOS device assembly is substantially uniform when the gate regions of the first and second transistors are biased using the same voltage.Type: GrantFiled: November 15, 2011Date of Patent: July 17, 2018Assignee: X-FAB SEMICONDUCTOR FOUNDRIES AGInventors: Brendan Toner, Tsui Ping Chu, Foo Sen Liew
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Patent number: 9793338Abstract: A semiconductor device comprising a semiconductor substrate and a composite capacitor structure on the semiconductor substrate, wherein the composite capacitor structure comprises a capacitor stack comprising a lower and an upper capacitor, respectively comprising first and second dielectric materials, wherein the first and second dielectric materials are different materials and/or have different thicknesses from each other. This can minimize the voltage dependence of the capacitance of the composite capacitor structure. It is also possible to provide a composite capacitor structure on the semiconductor substrate, wherein the composite capacitor structure comprises at least a first and a second capacitor stack, each comprising a lower and an upper capacitor. The capacitors can be MIM capacitors.Type: GrantFiled: July 16, 2010Date of Patent: October 17, 2017Assignee: X-FAB SEMICONDUCTOR FOUNDRIES AGInventors: Tsui Ping Chu, Peng Yang, Evie Siaw Hei Kho, Yong Kheng Ang, Swee Hua Tia
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Patent number: 9059110Abstract: A method of reducing contamination of contact pads in a metallization system of a semiconductor device. Fluorine contamination of contact pads in a semiconductor device can be reduced by appropriately covering the sidewall portions of a metallization system in the scribe lane in order to significantly reduce or suppress the out diffusion of fluorine species, which may react with the exposed surface areas of the contact pads. The quality of the bond contacts is enhanced, possibly without requiring any modifications in terms of design rules and electrical specifications.Type: GrantFiled: September 4, 2009Date of Patent: June 16, 2015Assignee: X-Fab Semiconductor Foundries AGInventors: Hyung Sun Yook, Tsui Ping Chu, Poh Ching Sim
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Publication number: 20140367796Abstract: A MOS device assembly having at least two transistors, each transistor having a gate region. The dimensions of the gate region of the first transistor are different from the dimensions of the gate region of the second transistor. The transconductance of the MOS device assembly is substantially uniform when the gate regions of the first and second transistors are biased using the same voltage.Type: ApplicationFiled: November 15, 2011Publication date: December 18, 2014Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AGInventors: Brendan Toner, Tsui Ping Chu, Foo Sen Liew
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Patent number: 8736021Abstract: In an integrated circuit an inductor metal layer is provided separately to the top metal layer, which includes the power and signal routing metal lines. Consequently, high performance inductors can be provided, for instance by using a moderately high metal thickness substantially without requiring significant modifications of the remaining metallization system.Type: GrantFiled: May 15, 2009Date of Patent: May 27, 2014Assignee: X-FAB Semiconductor Foundries AGInventors: Tsui Ping Chu, Hyung Sun Yook, Poh Ching Sim
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Publication number: 20130140677Abstract: A semiconductor device comprising a semiconductor substrate and a composite capacitor structure on the semiconductor substrate, wherein the composite capacitor structure comprises a capacitor stack comprising a lower and an upper capacitor, respectively comprising first and second dielectric materials, wherein the first and second dielectric materials are different materials and/or have different thicknesses from each other. This can minimize the voltage dependence of the capacitance of the composite capacitor structure. It is also possible to provide a composite capacitor structure on the semiconductor substrate, wherein the composite capacitor structure comprises at least a first and a second capacitor stack, each comprising a lower and an upper capacitor. The capacitors can be MIM capacitors.Type: ApplicationFiled: July 16, 2010Publication date: June 6, 2013Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AGInventors: Tsui Ping Chu, Peng Yang, Evie Siaw Hei Kho, Yong Kheng Ang, Swee Hua Tia
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Publication number: 20120241914Abstract: A method of reducing contamination of contact pads in a metallization system of a semiconductor device. Fluorine contamination of contact pads in a semiconductor device can be reduced by appropriately covering the sidewall portions of a metallization system in the scribe lane in order to significantly reduce or suppress the out diffusion of fluorine species, which may react with the exposed surface areas of the contact pads. The quality of the bond contacts is enhanced, possibly without requiring any modifications in terms of design rules and electrical specifications.Type: ApplicationFiled: September 4, 2009Publication date: September 27, 2012Applicant: X-Fab Semiconductor Foundries AGInventors: Hyung Sun Yook, Tsui Ping Chu, Poh Ching Sim
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Publication number: 20120068303Abstract: In an integrated circuit an inductor metal layer is provided separately to the top metal layer, which includes the power and signal routing metal lines. Consequently, high performance inductors can be provided, for instance by using a moderately high metal thickness substantially without requiring significant modifications of the remaining metallization system.Type: ApplicationFiled: May 15, 2009Publication date: March 22, 2012Inventors: Tsui Ping Chu, Hyung Sun Yook, Poh Ching Sim
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Patent number: 6759857Abstract: A new method and apparatus for detecting and measuring the level of metal present on the surface of a substrate is achieved. Energy, in the form of rf or light or microwave energy, is directed at the surface of a wafer, the reflected energy or the energy that passes through the semiconductor substrate is captured and analyzed for energy level and/or frequency content. Based on this analysis conclusions can be drawn regarding presence and type of metal on the surface of the wafer. Furthermore, by inclusion of metal within the resonating circuit of an rf generator changes the frequency of the vibration and therefore detects the presence of metal.Type: GrantFiled: September 27, 2002Date of Patent: July 6, 2004Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Sik On Kong, Tsui Ping Chu
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Patent number: 6633170Abstract: A new method and apparatus for detecting and measuring the level of metal present on the surface of a substrate is achieved. Energy, in the form of rf or light or microwave energy, is directed at the surface of a wafer, the reflected energy or the energy that passes through the semiconductor substrate is captured and analyzed for energy level and/or frequency content. Based on this analysis conclusions can be drawn regarding presence and type of metal on the surface of the wafer. Furthermore, by inclusion of metal within the resonating circuit of an rf generator changes the frequency of the vibration and therefore detects the presence of metal.Type: GrantFiled: September 30, 2002Date of Patent: October 14, 2003Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Sik On Kong, Tsui Ping Chu
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Publication number: 20030042915Abstract: A new method and apparatus for detecting and measuring the level of metal present on the surface of a substrate is achieved. Energy, in the form of rf or light or microwave energy, is directed at the surface of a wafer, the reflected energy or the energy that passes through the semiconductor substrate is captured and analyzed for energy level and/or frequency content. Based on this analysis conclusions can be drawn regarding presence and type of metal on the surface of the wafer. Furthermore, by inclusion of metal within the resonating circuit of an rf generator changes the frequency of the vibration and therefore detects the presence of metal.Type: ApplicationFiled: September 27, 2002Publication date: March 6, 2003Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.Inventors: Sik On Kong, Tsui Ping Chu
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Publication number: 20030038642Abstract: A new method and apparatus for detecting and measuring the level of metal present on the surface of a substrate is achieved. Energy, in the form of rf or light or microwave energy, is directed at the surface of a wafer, the reflected energy or the energy that passes through the semiconductor substrate is captured and analyzed for energy level and/or frequency content. Based on this analysis conclusions can be drawn regarding presence and type of metal on the surface of the wafer. Furthermore, by inclusion of metal within the resonating circuit of an rf generator changes the frequency of the vibration and therefore detects the presence of metal.Type: ApplicationFiled: September 30, 2002Publication date: February 27, 2003Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.Inventors: Sik On Kong, Tsui Ping Chu
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Patent number: 6476604Abstract: A new method and apparatus for detecting and measuring the level of metal present on the surface of a substrate is achieved. Energy, in the form of rf or light or microwave energy, is directed at the surface of a wafer, the reflected energy or the energy that passes through the semiconductor substrate is captured and analyzed for energy level and/or frequency content. Based on this analysis conclusions can be drawn regarding presence and type of metal on the surface of the wafer. Furthermore, by inclusion of metal within the resonating circuit of an rf generator changes the frequency of the vibration and therefore detects the presence of metal.Type: GrantFiled: April 12, 1999Date of Patent: November 5, 2002Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Sik On Kong, Tsui Ping Chu