Abstract: Electronic equipment according to the present disclosure includes a writable non-volatile memory, a plurality of volatile memories, and a sequencer. The writable non-volatile memory stores an operation parameter group required to operate the electronic equipment. Respective addresses are assigned to the plurality of volatile memories. The plurality of volatile memories includes a specified volatile memory. The specified volatile memory stores a part of the operation parameters among the operation parameter group. The specified volatile memory is accessible by inputting an Enable signal. The sequencer can read and write the non-volatile memory when the Enable signal allows an operation parameter stored in the volatile memory to be written to the non-volatile memory.

Abstract: There is provided a signal generator outputting an analog frequency signal based on a digital value according to a set frequency, which provides excellent noise characteristics, requires no ROM table corresponding to waveform data, and has a simple configuration. A digital signal having a digital value according to a set frequency is integrated to generate a waveform in a sawtooth shape, a waveform in a triangular wave shape is generated based on the waveform, and this waveform output is differentiated and then D/A converted and integrated. A comparator using, for example, the voltage at a midpoint of the triangular wave as a threshold value is used for the integrated output, and a frequency signal of an objective frequency is obtained from the comparator.

Abstract: Provided is a frequency synthesizer capable of fine setting over a wide band and having a wide frequency pull-in range. A sine wave signal of an output frequency of a voltage controlled oscillating part is quadrature-detected, and in a PLL utilizing a vector rotating at a frequency (velocity) equal to a difference from a frequency of a frequency signal used for the detection, a frequency pull-in means integrates a first constant for increasing the output frequency as a pull-in voltage when a control voltage from the PLL to the voltage controlled oscillating part is larger than a prescribed set range, and integrates a second constant for decreasing the output frequency as the pull-in voltage when the control voltage is smaller than the set range. Then, an adding means adds the control voltage from the PLL and the pull-in voltage from the frequency pull-in means to output an addition result to the voltage controlled oscillating part.

Abstract: The provision of a technique capable of determining a state where PLL control does not operate normally instantly or in advance in a frequency synthesizer that frequency-divides, A/D converts, and quadranture-detects a frequency signal from a voltage controlled oscillating unit, and extracts a rotation vector rotating at a frequency difference between the frequency signal used for the detection and the A/D converted frequency signal, and integrates a difference between a frequency of the above rotation vector and a set frequency to set an integration result as a control voltage to the voltage controlled oscillating unit. The control voltage to be input to the voltage controlled oscillating unit is monitored, and it is determined whether or not a level of the monitored control voltage deviates from a set range determined in advance, and an unlock detection signal is output.

Abstract: A frequency synthesizer using a PLL has a simple structure and excellent spurious characteristics. A reference frequency signal inputted into a phase comparison unit is generated based on a clock when a zero cross point of a sawtooth wave composed of a digital signal is detected. However, in this case, since the digital values are skipped values, the digital value does not always become zero when its positive/negative sign is inverted. Hence, where the clock signals reading the digital value immediately before and the digital value immediately after the zero cross time when the positive/negative sign is inverted in a region where the digital value gradually changes are P1 and P2 respectively and the clock signal at a timing next to the clock signal P2 is P3, P1 and P3 are used at a ratio corresponding to the ratio between the digital values read by P1 and P2.

Abstract: An atmosphere temperature at which a quartz-crystal oscillator and an oscillation circuit are placed is controlled in high accuracy, and an output frequency with high stability is obtained. If oscillation outputs of first and second quartz-crystal oscillators are set to f1 and f2, and oscillation frequencies of the oscillation outputs at a reference temperature are set to f1r and f2r, respectively, {(f2?f1)/f1}?{(f2r?f1r)/f1r} is calculated by a frequency difference detection unit. A digital value can be obtained by representing this value by 34-bit digital value, corresponding to a temperature. Therefore, this value is treated as a temperature detection value, a difference with a temperature set value is supplied to the loop filter, and the digital value therefrom is converted into a direct-current voltage to control a heater.

Abstract: In forming a frequency synthesizer by using PLL using processing of digital signals, an A/D converting unit is not required. By the integration of a digital value that depends on a set frequency, a saw-tooth wave serving as a phase signal is generated. A frequency signal output from a voltage-controlled oscillator is input via a frequency divider to an edge detecting unit, which then detects a rising edge or a falling edge of the frequency signal to generate a rectangular-wave signal that depends on a frequency of the frequency signal. Then, a latched circuit latches a value of the saw-tooth wave in response to the rectangular-wave signal, and this value is integrated in a loop filter and the resultant is used as a control voltage of the voltage-controlled oscillator.

Abstract: There is provided a signal generator outputting an analog frequency signal based on a digital value according to a set frequency, which provides excellent noise characteristics, requires no ROM table corresponding to waveform data, and has a simple configuration. A digital signal having a digital value according to a set frequency is integrated to generate a waveform in a sawtooth shape, a waveform in a triangular wave shape is generated based on the waveform, and this waveform output is differentiated and then DIA converted and integrated. A comparator using, for example, the voltage at a midpoint of the triangular wave as a threshold value is used for the integrated output, and a frequency signal of an objective frequency is obtained from the comparator.

Abstract: A frequency synthesizer using a PLL has a simple structure and excellent spurious characteristics. A reference frequency signal inputted into a phase comparison unit is generated based on a clock when a zero cross point of a sawtooth wave composed of a digital signal is detected. However, in this case, since the digital values are skipped values, the digital value does not always become zero when its positive/negative sign is inverted. Hence, where the clock signals reading the digital value immediately before and the to digital value immediately after the zero cross time when the positive/negative sign is inverted in a region where the digital value gradually changes are P1 and P2 respectively and the clock signal at a timing next to the clock signal P2 is P3, P1 and P3 are used at a ratio corresponding to the ratio between the digital values read by P1 and P2.

Abstract: There is provided a digital signal processing device capable of suppressing occurrence of an unnecessary frequency component (spurious) in performing a reduction processing of a bit number of a frequency signal made of a digital signal. A signal output section 10 outputs a frequency signal by a digital signal made of bit data and an addition section 16 adds noise data for suppressing occurrence of an unnecessary frequency component to the bit data. A reduction processing section 11 performs a predetermined processing in correspondence with whether the bit data obtained in the addition section 16 is positive or negative, and thereafter, shifts each bit of the bit data to the right by m digits set in advance (m is an integer smaller than a bit number of the bit data) and cut off an m-bit portion to reduce the number, rounding down “0” and rounding up “1” for the most significant bit of the bits having been cut off.

Abstract: The provision of a technique capable of determining a state where PLL control does not operate normally instantly or in advance in a frequency synthesizer that frequency-divides, A/D converts, and quadranture-detects a frequency signal from a voltage controlled oscillating unit, and extracts a rotation vector rotating at a frequency difference between the frequency signal used for the detection and the A/D converted frequency signal, and integrates a difference between a frequency of the above rotation vector and a set frequency to set an integration result as a control voltage to the voltage controlled oscillating unit. The control voltage to be input to the voltage controlled oscillating unit is monitored, and it is determined whether or not a level of the monitored control voltage deviates from a set range determined in advance, and an unlock detection signal is output.

Abstract: There is provided a frequency synthesizer capable of improving phase noise. A sinusoidal signal with a frequency set by a frequency setting part is output as a digital signal from a set signal output part, and the digital signal is D/A-converted. A difference between a sinusoidal signal with a frequency corresponding to an output frequency of a voltage controlled oscillating part and a sinusoidal signal output from a D/A converting part is amplified by a differential amplifier, and an amplified signal is input via an A/D converting part to a means for extracting a phase difference between the aforesaid sinusoidal signals. A voltage corresponding to a signal being the result of integration of the phase difference is input as a control voltage to the voltage controlled oscillating part. Then, a gain of the differential amplifier is set larger than a maximum value of phase noise degradation of the A/D converting part, whereby the phase noise degradation of the A/D converting part is cancelled.

Abstract: An object of the present invention is to provide a sensing instrument capable to detect a substance existing in a very small quantity, such as environmental pollutants, instantly with a high degree of precision. As a specific means for solving the problem, a frequency signal from a crystal oscillator is sampled using a frequency signal from a reference clock generating part, the sampling value is outputted in a digital signal, quadrature detection is conducted with the digital signal for a frequency signal corresponding to the output signal, the rotational vector rotating at a frequency corresponding to the difference between the frequency of the frequency signal and the frequency of a sinusoidal wave used for the quadrature detection is taken out, and the variation of the frequency is detected by detecting the velocity of the rotational vector based on the respective sampling values.

Abstract: An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As a specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of a vector when the output frequency of the voltage-controlled oscillator is equal to a set value is calculated in advance. The voltage signal corresponding to the difference between the frequency of the vector and the calculated frequency is fed back to the voltage-controlled oscillator when the voltage-controlled oscillator is driven, and PLL is formed so that the difference is equal to zero.

Abstract: Provided is a frequency synthesizer capable of fine setting over a wide band and having a wide frequency pull-in range. A sine wave signal of an output frequency of a voltage controlled oscillating part is quadrature-detected, and in a PLL utilizing a vector rotating at a frequency (velocity) equal to a difference from a frequency of a frequency signal used for the detection, a frequency pull-in means integrates a first constant for increasing the output frequency as a pull-in voltage when a control voltage from the PLL to the voltage controlled oscillating part is larger than a prescribed set range, and integrates a second constant for decreasing the output frequency as the pull-in voltage when the control voltage is smaller than the set range. Then, an adding means adds the control voltage from the PLL and the pull-in voltage from the frequency pull-in means to output an addition result to the voltage controlled oscillating part.

Abstract: An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As s specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of a vector when the output frequency of the voltage-controlled oscillator is equal to a set value is calculated in advance. The voltage signal corresponding to the difference between the frequency of the vector and the calculated frequency is fed back to the voltage-controlled oscillator when the voltage-controlled oscillator is driven, and PLL is formed so that the difference is equal to zero.

Abstract: An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As s specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of a vector when the output frequency of the voltage-controlled oscillator is equal to a set value is calculated in advance. The voltage signal corresponding to the difference between the frequency of the vector and the calculated frequency is fed back to the voltage-controlled oscillator when the voltage-controlled oscillator is driven, and PLL is formed so that the difference is equal to zero.

Abstract: There is provided a digital signal processing device capable of suppressing occurrence of an unnecessary frequency component (spurious) in performing a reduction processing of a bit number of a frequency signal made of a digital signal. A signal output section 10 outputs a frequency signal by a digital signal made of bit data and an addition section 16 adds noise data for suppressing occurrence of an unnecessary frequency component to the bit data. A reduction processing section 11 performs a predetermined processing in correspondence with whether the bit data obtained in the addition section 16 is positive or negative, and thereafter, shifts each bit of the bit data to the right by m digits set in advance (m is an integer smaller than a bit number of the bit data) and cut off an m-bit portion to reduce the number, rounding down “0” and rounding up “1” for the most significant bit of the bits having been cut off.

Abstract: A PLL circuit which can absorb variation of phase noise characteristic due to temperature and individual difference and has a phase noise suppression characteristic stable in a wide frequency band is provided. The PLL circuit comprises, at the succeeding stage, a first register for storing a first parameter for controlling the loop gain, a first multiplier for multiplying the output of the phase comparator by a first parameter, a second register for storing a second parameter for controlling the response characteristic, a second multiplier for multiplying the output of the first multiplier by a second parameter, and a CPU for setting optimum parameters in the first and second registers depending on the use frequency band, the ambient temperature, and the device individual difference. By controlling the loop gain and the response characteristic to optimum values, a good suppression characteristic in a wide frequency band is achieved.

Abstract: An object of the present invention is to reduce spurious generation due to a malfunction of an A/D converter in a device performing digital processing by converting an analog signal high in cyclic characteristics to a digital signal with the A/D converter. As a concrete solving means, for instance, in a frequency synthesizer of a certain system, the A/D converter is provided on an output side of a voltage controlled oscillator, and its output signal is given to a device performing digital processing to feed back the processing result to the voltage controlled oscillator through D/A conversion. In this case, the noise generated in the band noise generator is added to an input signal of the above-described analog/digital converter. This band noise is a band not affecting the digital signal processing performed by the device.