Patents by Inventor Tsukui Seiichirou

Tsukui Seiichirou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 5396102
    Abstract: In an SIP type module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the positions closer to the end portion of the substrate in order to drastically reduce the packaging height.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: March 7, 1995
    Assignees: Hitachi, Ltd., Hitachi Tobu Semiconductor, Ltd.
    Inventors: Sugano Toshio, Tsukui Seiichirou, Suzuki Shigeru
  • Semiconductor device having particular mounting arrangement
    Patent number: 5227664
    Abstract: In an SIP type module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the positions closer to the end portion of the substrate in order to drastically reduce the packaging height.
    Type: Grant
    Filed: June 5, 1991
    Date of Patent: July 13, 1993
    Assignees: Hitachi, Ltd., Hitachi Tobu Semiconductor
    Inventors: Sugano Toshio, Tsukui Seiichirou, Suzuki Shigeru
  • Semiconductor device
    Patent number: 4984064
    Abstract: In an SIP type module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the position closer to the end portion of the substrate in order to drastically reduce the packaging height.
    Type: Grant
    Filed: February 15, 1989
    Date of Patent: January 8, 1991
    Assignees: Hitachi, Ltd., Hitachi Tobu Semiconductor, Ltd.
    Inventors: Sugano Toshio, Tsukui Seiichirou, Suzuki Shigeru