Abstract: The present disclosure provides a semiconductor package. The semiconductor package includes a first die, a plurality of first bonding pads, a plurality of first conductive bumps, a molding layer and a redistribution layer. The first die has a top surface and a bottom surface opposing to the top surface. The first bonding pads are disposed on the top surface of the first die. The first conductive bumps are disposed on the first bonding pads, and the first conductive bumps are electrically connected with the first die. The molding layer covers the top surface of the first die and exposes the first conductive bumps. The redistribution layer is disposed on the molding layer to electrically connect to the first conductive bumps. The present disclosure further provides a method of manufacturing the above semiconductor package.

Abstract: The present disclosure provides a semiconductor package. The semiconductor package includes a heat spreader, a first die, a plurality of first conductive bumps, a molding layer and a redistribution layer. The first die is disposed on the heat spreader and has a top surface and a bottom surface opposing to the top surface. The first conductive bumps are disposed on the top surface of the first die and electrically connected to the first die. The molding layer is formed on the heat spreader to cover the top surface of the first die and expose the first conductive bumps. The redistribution layer is disposed on the molding layer to electrically connect to the first conductive bumps. The present disclosure further provides a method of manufacturing the above semiconductor package.

Abstract: A substrate includes: (1) a first patterned conductive layer, the first patterned conductive layer including a pair of first transmission lines adjacent to each other; and (2) a first reference layer above the pair of first transmission lines, the first reference layer defining an opening, wherein the pair of first transmission lines are exposed to the opening.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate, an interposer disposed on the substrate, a conductive pillar disposed on the substrate, a first semiconductor device disposed on the interposer and electrically connected to the conductive pillar, a second semiconductor device disposed on the interposer, and an encapsulant surrounding the conductive pillar. The first semiconductor device includes a first conductive pad electrically connected to the interposer. The second semiconductor device includes a second conductive pad electrically connected to the interposer.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate, an interposer disposed on the substrate, a conductive pillar disposed on the substrate, a first semiconductor device disposed on the interposer and electrically connected to the conductive pillar, a second semiconductor device disposed on the interposer, and an encapsulant surrounding the conductive pillar. The first semiconductor device includes a first conductive pad electrically connected to the interposer. The second semiconductor device includes a second conductive pad electrically connected to the interposer.

Abstract: A substrate includes: (1) a first patterned conductive layer, the first patterned conductive layer including a pair of first transmission lines adjacent to each other; and (2) a first reference layer above the pair of first transmission lines, the first reference layer defining an opening, wherein the pair of first transmission lines are exposed to the opening.

Abstract: In one or more embodiments, a substrate includes a patterned conductive layer and a reference layer. The patterned conductive layer includes a pair of first conductive traces, a pair of second conductive traces and a reference trace between the pair of first conductive traces and the pair of second conductive traces. The reference layer is above the patterned conductive layer and defines an opening.

Abstract: In one or more embodiments, a substrate includes a patterned conductive layer and a reference layer. The patterned conductive layer includes a pair of first conductive traces, a pair of second conductive traces and a reference trace between the pair of first conductive traces and the pair of second conductive traces. The reference layer is above the patterned conductive layer and defines an opening.