Patents by Inventor Tsunaaki Shidei

Tsunaaki Shidei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit having test circuitry with reduced power consumption
    Patent number: 7444569
    Abstract: The present invention provides a semiconductor integrated circuits that can prevent causes arising a problem of the power consumption during the normal operation thereof. Solution: The present invention relates to a semiconductor integrated circuit having a plurality of memory device of the scan thereof having functions to output the status values during the scan test therein. At least, a part of the memory device of the scan includes a first signal-outputting unit outputting a signal during the normal operation therein and a second signal-outputting unit outputting a signal during the scan test operation therein, respectively.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: October 28, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tsunaaki Shidei
  • Semiconductor intergrated circuit
    Publication number: 20050229058
    Abstract: The present invention provides a semiconductor integrated circuits that can prevent causes arising a problem of the power consumption during the normal operation thereof. Solution: The present invention relates to a semiconductor integrated circuit having a plurality of memory device of the scan thereof having functions to output the status values during the scan test therein. At least, a part of the memory device of the scan includes a first signal-outputting unit outputting a signal during the normal operation therein and a second signal-outputting unit outputting a signal during the scan test operation therein, respectively.
    Type: Application
    Filed: March 9, 2005
    Publication date: October 13, 2005
    Inventor: Tsunaaki Shidei