Abstract: A semiconductor test apparatus includes an inputting module, a monitor, a converter, a storage, and a tester. The inputting module inputs addresses for first test, in which the addresses of a plurality of semiconductor memories are arrayed in an arbitrary order. The monitor monitors test time of the first test on each semiconductor memory. The converter sorts the addresses of the semiconductor memories based on the test time in order to convert the address for the first test to addresses for a second test. The storage stores the addresses for the second test. The tester tests each semiconductor device based on the addresses for the second test stored in the storage.

Abstract: A semiconductor device includes at least three circuit substrates laid one upon another. The device further includes first circuit elements mounted, respectively, on at least two of the three circuit substrates. It also includes a second circuit element mounted on one of the three circuit substrates and configured to change connection between the first circuit elements.

Abstract: A diesel engine control system and control method capable of conducting accurate fuel injection unaffected by variations in injector performance caused by differences among individual injectors or change with aging. The diesel engine control system includes an injector for directly injecting fuel into a combustion chamber of a diesel engine, injection quantity controller for controlling fuel injection quantity by varying a period of electric current supply to the injector, estimator for estimating that an electric current supply period when a prescribed (stable) combustion state is obtained is the current supply period for injecting the amount of fuel required for the prescribed combustion state, and control data correcting device for correcting control data of the injection quantity controller based on the estimated current supply period.

Abstract: A semiconductor device includes at least three circuit substrates laid one upon another. The device further includes first circuit elements mounted, respectively, on at least two of the three circuit substrates. It also includes a second circuit element mounted on one of the three circuit substrates and configured to change connection between the first circuit elements.

Abstract: A testing apparatus for semiconductor device capable of preventing reduction in the number of devices to be simultaneously measured is provided. Address of a measurement section of a semiconductor device to be measured, input data inputted to the measurement section and expected data to be outputted from the semiconductor device when the input data is inputted are generated by an ALPG. Output data actually outputted from the semiconductor device when the input data is inputted and expected data are compared with each other at a comparison unit. Comparison result is outputted as fail information. By a test pass control unit, there is generated test pass information for selecting fail information on the basis of divisional test information inputted in the case where the cycle time of test is faster than the cycle time of the fail information storage memory. Memory cell within the fail information storage memory is selected on the basis of address of the measurement section.