Abstract: An outer coating substrate for an electronic component is constructed to be calcined at a low temperature, and greatly decreases the cost thereof while greatly improving the dimensional precision of the substrate. The outer coating substrate for an electronic component includes a multi-layered substrate including a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer. The first and second material layers are laminated, and calcined at the calcining temperature of the first material layer.

Abstract: A substrate of a case for packaging an electronic component includes a conductive cap bonded to a substrate to cover the electronic component and to tightly seal an enclosed space. The substrate has a substrate body layer, electrodes disposed on the substrate body layer, and a glass ceramic layer disposed on the substrate body layer so as to cover a portion of the electrodes.

Abstract: An outer coating substrate for an electronic component is constructed to be calcined at a low temperature, and greatly decreases the cost thereof while greatly improving the dimensional precision of the substrate. The outer coating substrate for an electronic component includes a multi-layered substrate including a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer. The first and second material layers are laminated, and calcined at the calcining temperature of the first material layer.

Abstract: An outer coating substrate for an electronic component is constructed to be calcined at a low temperature, and greatly decreases the cost thereof while greatly improving the dimensional precision of the substrate. The outer coating substrate for an electronic component includes a multi-layered substrate including a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer. The first and second material layers are laminated, and calcined at the calcining temperature of the first material layer.

Abstract: An outer coating substrate for an electronic component is constructed to be calcined at a low temperature, and greatly decreases the cost thereof while greatly improving the dimensional precision of the substrate. The outer coating substrate for an electronic component includes a multi-layered substrate including a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer. The first and second material layers are laminated, and calcined at the calcining temperature of the first material layer.

Abstract: A surface mounting structure is arranged to minimize a height dimension of an electronic component. A surface mount type electronic component is provided on the surface mounting structure. The surface mount type electronic component includes a piezoelectric component element including an insulating substrate, and a piezo-resonator mounted on a mounting surface of the insulating substrate. The piezoelectric component element is mounted on a printed circuit board, with the mounting surface being arranged to face a surface of the printed circuit board. A recess is formed in the printed circuit board and a portion of the piezoelectric component element is accommodated in the recess. A conductive adhesive is located on external connection electrodes provided on the mounting surface and is firmly attached to circuit patterns on the printed circuit board so that the piezoelectric component element is fixed to the printed circuit board.

Abstract: A substrate of a case for packaging an electronic component includes a conductive cap bonded to a substrate to cover the electronic component and to tightly seal an enclosed space. The substrate has a substrate body layer, electrodes disposed on the substrate body layer, and a glass ceramic layer disposed on the substrate body layer so as to cover a portion of the electrodes.

Abstract: Disclosed herein is an energy-trapped type piezoelectric resonator, which comprises a piezoelectric resonance element having a piezoelectric plate and a pair of resonance electrodes formed on opposite major surfaces of the piezoelectric plate to have portions opposed to each other through the piezoelectric plate for defining a resonance part through the opposed portions of the resonance electrodes, a pair of reinforcing members holding both major surfaces of the piezoelectric resonance element to be integrated with the same so as to define a space in a region around the resonance part of the piezoelectric resonance element and not to inhibit the resonance part from vibration, and a pair of terminals, holding the piezoelectric resonance element and the pair of reinforcing members as integrated, electrically connected with the pair of resonance electrodes of the piezoelectric resonance element respectively.