Abstract: An object of the invention is to eliminate a marking process and shorten the time and decrease the cost required for changing contents of marking. An uneven mask is mounted, using a mask set jig, on a mark surface die of the molding die for forming a resin mold package of a semiconductor device. The mark surface die is formed with jig-fixing grooves for mounting the mask set jig. The uneven mask is formed with protrusions and recesses corresponding to the contents of marking to be attached to the surface of the resin mold package. The contents of marking can thus be attached simultaneously with the molding process, and therefore the marking process after molding can be omitted. In accordance with the contents of marking, the uneven mask can be replaced. The time and cost required for changing the contents of marking can thus be reduced.

Abstract: A contention control circuit which temporarily stores cells arriving from a respective plurality of input lines to output cells to a single output line without collisions. The contention control circuit compares, at each input line in turn, the priority of the cell that has arrived from that input line, with the priority of the cell selected from among the cells that have arrived from preceding input lines as the cell having the highest priority, and again selects the cell with the higher priority.

Abstract: A resin for sealing a compound semiconductor is here disclosed which contains, as a matrix, a siloxane compound for producing a silicone resin by addition reaction and which has a group comprising the bond of an organic group and an oxy group. The group comprising the bond of the organic group and the oxy group bonds to a terminal of the molecule of the siloxane compound, and as this group comprising the bond, 0.1 to 10% by weight, preferably 0.1 to 1.5% by weight of an alkoxy group (--OR') is used. A compound semiconductor chip is covered with the resin for sealing the compound semiconductor and then reacted under predetermined conditions to produce a silicone resin and simultaneously to chemically bond a siloxane group (--Si--O--) in the silicone resin to an element in a portion of the compound semiconductor chip which comes in contact with the silicone resin.

Abstract: A direct-current stabilizer includes an n-p-n transistor as a control transistor, and a control terminal to which a control voltage for driving the control transistor is applied. The value of the control voltage is determined so that a voltage applied to the base of the control transistor is not lower than the sum of the emitter voltage and the base-emitter voltage. With this structure, since the control transistor is driven by the control voltage of a value different from that of the input voltage, it is possible to limit the input voltage to a low value, allowing the difference between the input voltage and the output voltage to be minimized. Moreover, it is possible to switch the output of the direct-current stabilizer by connecting to the control terminal a transistor for switching the application of the control voltage to the control terminal between on and off. Furthermore, when the control terminal is connected to the input terminal, the control transistor is driven by the input voltage.

Abstract: A method of manufacturing a resin-sealed semiconductor device includes the steps of: supporting and fixing a supporting plate in a set of molds using a positioning pin with a sharp pin point which is inserted into the molds to have a predetermined clearance from the supporting plate; injecting a sealing resin 11 into a cavity formed in the molds; and removing the positioning pin from the molds after the sealing resin 11 hardens. This method increases the life of the positioning pin, facilitates the removal of a semiconductor device from the molds, and achieves a semiconductor device with good insulation.

Abstract: A semiconductor memory includes a plurality of memory cells which are arranged in a matrix and respectively store data, a plurality of bit lines and a plurality of word lines, connected to the plurality of memory cells, for performing read/write access of data to the memory cells, and a test circuit. In the test circuit, an external terminal sends test data and expected value data written in the memory cells. A simultaneous write circuit simultaneously writes the test data from the external terminal in the plurality of memory cells connected to a selected word line. A simultaneous comparison circuit simultaneously compares the test data written in the plurality of memory cells connected to the selected word line with the expected value data supplied from the external terminal in correspondence with the selected word line.

Abstract: In a semiconductor memory, a memory cell array is divided into a plurality of sub arrays in a direction perpendicular to word lines. In each sub array sub word lines and bit lines are disposed to intersect each other and memory cells are disposed at all their intersections. Two different sub arrays constitute a unit cell array. The sub word line connected to a cell transistor in one of or the first the sub arrays of the unit cell array is connected to a first main word line and a second main word line which is not connected to the cell transistor in the first sub array is passed therethrough for connection with the sub word line of the other or second sub array in the unit cell array.