Abstract: According to one embodiment, a memory device includes a first silicon substrate, a second silicon substrate, and a memory cell array. A first CMOS circuit is formed on the first silicon substrate. The second silicon substrate is provided above the first silicon substrate in a stacking direction. A second CMOS circuit is formed on the second silicon substrate. The memory cell array is provided above the second silicon substrate in the stacking direction. The memory cell array is connected to the first CMOS circuit and the second CMOS circuit and includes a plurality of memory cells arranged in the stacking direction of the first silicon substrate and the second silicon substrate.

Abstract: A semiconductor storage device includes a base portion, a stacked body, and a first column. The base portion includes a substrate, a semiconductor element on the substrate, lower-layer wiring above the semiconductor element, and a first conductive layer above the lower-layer wiring and made of a metal compound or polycrystal silicon. The stacked body is above the first conductive layer. The stacked body includes second conductive layers and insulating films stacked alternately. The first column includes a semiconductor body and a memory film. The semiconductor body extends in a stacked direction of the stacked body and is electrically connected to the first conductive layer. A memory film has a charge trap between the plurality of second conductive layers and the semiconductor body. The first conductive layer is provided between the stacked body and the lower-layer wiring, and between a peripheral region of the stacked body and the lower-layer wiring.

Abstract: A semiconductor storage device includes a base portion, a stacked body, and a first column. The base portion includes a substrate, a semiconductor element on the substrate, lower-layer wiring above the semiconductor element, and a first conductive layer above the lower-layer wiring and made of a metal compound or polycrystal silicon. The stacked body is above the first conductive layer. The stacked body includes second conductive layers and insulating films stacked alternately. The first column includes a semiconductor body and a memory film. The semiconductor body extends in a stacked direction of the stacked body and is electrically connected to the first conductive layer. A memory film has a charge trap between the plurality of second conductive layers and the semiconductor body. The first conductive layer is provided between the stacked body and the lower-layer wiring, and between a peripheral region of the stacked body and the lower-layer wiring.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode layers; a select gate; a first insulating layer; a semiconductor portion including a top end portion; a charge storage film; a second insulating layer provided on the stacked body; a third insulating layer; and a contact portion. The third insulating layer includes: a first portion provided on the select gate with the first insulating layer between the first portion and the select gate, the first portion being in contact with an upper surface of the first insulating layer and separated from the second insulating layer, and a second portion provided on the second insulating layer, the second portion being in contact with the second insulating layer and separated from the first insulating layer, a thickness of the second portion being thicker than a thickness of the first portion in the stacking direction.

Abstract: According to one embodiment, a memory device includes: a first insulating film, a first electrode, a second insulating film, and a second electrode being stacked in a multilayer body, and an end of the first electrode extending outside a region directly under the second electrode in an end of the multilayer body; a pillar piercing the first electrode and the second electrode; a memory film between the first electrode and the pillar, between the second electrode and the pillar, and being capable of storing a charge; an insulating film on the end of the multilayer body; and a contact piercing the insulating film, and being connected to the end of the first electrode film. A first portion connected to the contact in the first electrode film includes a metal or a metal nitride. A second portion surrounding the memory film in the first electrode film includes silicon.

Abstract: A semiconductor device according to an embodiment includes a stacked body, a second insulating film, a third insulating film and a plurality of contacts. The stacked body includes alternatively stacked electrode films and first insulating films, and has an end portion in which a terrace is formed for each pair of the electrode film and the first insulating film. The second insulating film covers the upper faces and the lower faces of the electrode films in the end portion of the stacked body. The second insulating film has a composition different from the composition of the first insulating film. The third insulating film is provided on the end portion of the stacked body. The third insulating film has a composition different from the composition of the second insulating film. The contact passes through the third insulating film and the second insulating film, and contacts the electrode film.

Abstract: According to an embodiment, a method for fabricating a pattern includes forming a mask covering a first layer, and a second layer selectively provided on the first layer, and forming a groove dividing the first layer and the second layer using the mask. The mask includes a first portion formed on a region of the first layer on a first side of the second layer, a second portion formed on a region of the first layer on a second side of the second layer opposite to the first side, first extending parts extending over the second layer from the first portion toward the second portion, and second extending parts extending over the second layer from the second portion toward the first portion. Each of the second extending parts is located between the first extending parts adjacent to each other.

Abstract: A semiconductor device according to an embodiment includes a stacked body, a second insulating film, a third insulating film and a plurality of contacts. The stacked body includes alternatively stacked electrode films and first insulating films, and has an end portion in which a terrace is formed for each pair of the electrode film and the first insulating film. The second insulating film covers the upper faces and the lower faces of the electrode films in the end portion of the stacked body. The second insulating film has a composition different from the composition of the first insulating film. The third insulating film is provided on the end portion of the stacked body. The third insulating film has a composition different from the composition of the second insulating film. The contact passes through the third insulating film and the second insulating film, and contacts the electrode film.

Abstract: A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer, and a plurality of first conductive layers. The plurality of first conductive layers comprises a stepped portion formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The wiring comprises a plurality of second conductive layers extending upwardly from an upper surface of the first conductive layers comprising the stepped portion. The plurality of second conductive layers are formed such that upper ends thereof are aligned with a surface parallel to the substrate, and such that a diameter thereof decreases from the upper end thereof to a lower end thereof. The plurality of second conductive layers are formed such that the greater a length thereof in the perpendicular direction, the larger a diameter of the upper end thereof.

Abstract: According to an embodiment, a method for fabricating a pattern includes forming a mask covering a first layer, and a second layer selectively provided on the first layer, and forming a groove dividing the first layer and the second layer using the mask. The mask includes a first portion formed on a region of the first layer on a first side of the second layer, a second portion formed on a region of the first layer on a second side of the second layer opposite to the first side, first extending parts extending over the second layer from the first portion toward the second portion, and second extending parts extending over the second layer from the second portion toward the first portion. Each of the second extending parts is located between the first extending parts adjacent to each other.

Abstract: A method for manufacturing a semiconductor device includes: forming a first layer on a substrate; forming a first contact hole in the first layer; burying a sacrificial film in the first contact hole; forming a second layer on the first layer and the first contact hole after burying; forming a second contact hole reaching the sacrificial film in the second layer; removing the sacrificial film from the first contact hole via the second contact hole; and providing a contact electrode in the first contact hole and the second contact hole.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a stacked body including each of a plurality of electrode layers and each of a plurality of insulating layers stacked alternately; a first interlayer insulating film; a select gate electrode; a second interlayer insulating film; a pair of semiconductor layers; a first insulating film; a second insulating film; a third interlayer insulating film; a first contact electrode connected to one upper end of the pair of semiconductor layers; a second contact electrode connected to the other upper end of the pair of semiconductor layers; a third contact electrode connected to the second contact electrode; a first interconnect layer connected to the first contact electrode; and a second interconnect layer connected to the third contact electrode.

Abstract: A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer, and a plurality of first conductive layers. The plurality of first conductive layers comprises a stepped portion formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The wiring comprises a plurality of second conductive layers extending upwardly from an upper surface of the first conductive layers comprising the stepped portion. The plurality of second conductive layers are formed such that upper ends thereof are aligned with a surface parallel to the substrate, and such that a diameter thereof decreases from the upper end thereof to a lower end thereof. The plurality of second conductive layers are formed such that the greater a length thereof in the perpendicular direction, the larger a diameter of the upper end thereof.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor layer, first and second stacked bodies, first and second channel body layers, first and second memory films. The first stacked body includes electrode layers and first insulating films alternately stacked on the semiconductor layer. The first channel body layers pierces through the first stacked body in a stacking direction. Lower ends of the first channel body layers are connected. The first memory film is provided between the first channel body layers and the electrode layers. The second channel body layers pierces through the first stacked body in the stacking direction. Lower ends of the second channel body layers are connected. The second memory film is provided between the second channel body layers and the electrode layers. The second stacked body includes a first interlayer insulating film and a select gate layer.

Abstract: A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer, and a plurality of first conductive layers. The plurality of first conductive layers comprises a stepped portion formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The wiring comprises a plurality of second conductive layers extending upwardly from an upper surface of the first conductive layers comprising the stepped portion. The plurality of second conductive layers are formed such that upper ends thereof are aligned with a surface parallel to the substrate, and such that a diameter thereof decreases from the upper end thereof to a lower end thereof. The plurality of second conductive layers are formed such that the greater a length thereof in the perpendicular direction, the larger a diameter of the upper end thereof.

Abstract: A first region comprises: a semiconductor layer including a columnar portion, a charge storage layer, and a plurality of first conductive layers. The second region comprises: a plurality of second conductive layers formed in the same layer as the plurality of first conductive layers. The plurality of first conductive layers configure a stepped portion at an end vicinity of the first region. The stepped portion is formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The plurality of second conductive layers is formed such that positions of ends thereof at an end vicinity of the second region surrounding the first region are aligned in substantially the perpendicular direction to the substrate.

Abstract: A memory string is formed to surround the side surface of a columnar portion and a charge storing layer, and includes plural first conductive layers functioning as gates of memory transistors, and a first protecting layer stacked to protect an upper portion of the plural first conductive layers. The plural first conductive layers constitute a first stairway portion formed stepwise such that their ends are located at different positions. Each first conductive layer constitutes a step of the first stairway portion. A top surface of a first portion of the first stairway portion is covered with the first protecting layer including a first number of layers, and A tope surface of a second portion of the first stairway portion located at a lower level than the first portion is covered with the first protecting layer including a second number of layers fewer than the first number of layers.

Abstract: According to one embodiment, a semiconductor device includes a plurality of contact electrodes that reach corresponding conductive layers. Each of the contact electrodes includes a columnar portion, a stopper, and a first connection portion. The columnar portion extends in a stacked direction of the stacked body. The stopper covers the side of the columnar portion. The first connection portion is provided at a lower edge of the columnar portion. The first connection portion is in contact with the corresponding conductive layer. A cross-section dimension of the first connection portion in a direction orthogonal to the stacked direction is larger than a cross-section of the lower edge of the columnar portion. An etching rate of a material for the stopper is lower than an etching rate of a material for the first insulating layer.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor layer, first and second stacked bodies, first and second channel body layers, first and second memory films. The first stacked body includes electrode layers and first insulating films alternately stacked on the semiconductor layer. The first channel body layers pierces through the first stacked body in a stacking direction. Lower ends of the first channel body layers are connected. The first memory film is provided between the first channel body layers and the electrode layers. The second channel body layers pierces through the first stacked body in the stacking direction. Lower ends of the second channel body layers are connected. The second memory film is provided between the second channel body layers and the electrode layers. The second stacked body includes a first interlayer insulating film and a select gate layer.

Abstract: A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer, and a plurality of first conductive layers. The plurality of first conductive layers comprises a stepped portion formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The wiring comprises a plurality of second conductive layers extending upwardly from an upper surface of the first conductive layers comprising the stepped portion. The plurality of second conductive layers are formed such that upper ends thereof are aligned with a surface parallel to the substrate, and such that a diameter thereof decreases from the upper end thereof to a lower end thereof. The plurality of second conductive layers are formed such that the greater a length thereof in the perpendicular direction, the larger a diameter of the upper end thereof.