Patents by Inventor Tsuneo Yasuda

Tsuneo Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240316720
    Abstract: A local polishing system comprises: a particle estimation unit (30) for estimating the film thickness distribution of a wafer; a local polishing region setting unit (11) for setting a local polishing region on the wafer based on the film thickness distribution; a polishing head selection unit (12) for selecting a polishing head based on the size of the local polishing region; a model storage (20) holding a recipe generating model that defines the relation between an input node and an output node, the input node being an attribute of the local polishing region, the output node comprising a recipe for a polishing process; a polishing recipe generator (13) that puts an attribute of the local polishing region set by the local polishing region setting unit (11) into the input node of the recipe generating model and determines a polishing recipe for polishing the local polishing region; and a polishing recipe transmitter (15) for transmitting data of the polishing recipe to a local polishing module (200) that perfo
    Type: Application
    Filed: June 5, 2024
    Publication date: September 26, 2024
    Applicant: Ebara Corporation
    Inventors: Koichi TAKEDA, Tsuneo TORIKOSHI, Kunio OISHI, Katsuhide WATANABE, Hozumi YASUDA, Yu ISHII
  • Patent number: 12036634
    Abstract: A local polishing system comprises: a particle estimation unit (30) for estimating the film thickness distribution of a wafer; a local polishing region setting unit (11) for setting a local polishing region on the wafer based on the film thickness distribution; a polishing head selection unit (12) for selecting a polishing head based on the size of the local polishing region; a model storage (20) holding a recipe generating model that defines the relation between an input node and an output node, the input node being an attribute of the local polishing region, the output node comprising a recipe for a polishing process; a polishing recipe generator (13) that puts an attribute of the local polishing region set by the local polishing region setting unit (11) into the input node of the recipe generating model and determines a polishing recipe for polishing the local polishing region; and a polishing recipe transmitter (15) for transmitting data of the polishing recipe to a local polishing module (200) that perfo
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: July 16, 2024
    Assignee: EBARA CORPORATION
    Inventors: Koichi Takeda, Tsuneo Torikoshi, Kunio Oishi, Katsuhide Watanabe, Hozumi Yasuda, Yu Ishii
  • Publication number: 20030216819
    Abstract: A process flow (information) (260) has information about treatment of each process, a flow number of each the process, and information (270, 280) indicating whether an execution order of each the process is adjustable. Either of the order adjustable information (270) to indicate that the execution order is adjustable and the order unadjustable information (280) to indicate that the execution order is unadjustable, is supplied to each the process in the flag status, for example. Under a production management system (200), extraction means (220) extracts, by referring to the process flow (260), order adjustable processes each being unexecuted and having the order adjustable information (270), and adjustment means (230) adjusts the execution order of the extracted processes.
    Type: Application
    Filed: October 3, 2002
    Publication date: November 20, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventor: Tsuneo Yasuda
  • Patent number: 6567716
    Abstract: A cassette usage rule processing function 66 is used to store usage rules on cassettes for containing wafers. A process flow creation function 72 permits creation of reviewable process flows. A process flow check function 74 provides checks on whether the reviewable process flows comply with the cassette usage rules, and supplies only the conforming process flows to a production line. In each process, a processing condition display function 82 displays the applicable cassette usage rules for review by a line operator. If cassettes need to be changed before or after a process, a process start function 84 or a process end function 86 prompts the line operator to change the cassettes.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: May 20, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Patent number: 6490494
    Abstract: A method and apparatus for processing order control, in which a load of an examination work to review a processing order of lots is reduced and all the lot flows are conditioned so as to move at an almost constant speed with the result that not only can accuracy in scheduling of delivery and so on be improved but degradation of the lot flows is also prevented from occurring in advance. A proper number R of in-process lots and others are obtained and lots are stacked before each of apparatuses so as to be equal in number to the proper number R of in-process lots, thereby a target of the number Cg of processing processes can be achieved.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: December 3, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Publication number: 20020103556
    Abstract: A cassette usage rule processing function 66 is used to store usage rules on cassettes for containing wafers. A process flow creation function 72 permits creation of reviewable process flows. A process flow check function 74 provides checks on whether the reviewable process flows comply with the cassette usage rules, and supplies only the conforming process flows to a production line. In each process, a processing condition display function 82 displays the applicable cassette usage rules for review by a line operator. If cassettes need to be changed before or after a process, a process start function 84 or a process end function 86 prompts the line operator to change the cassettes.
    Type: Application
    Filed: July 24, 2001
    Publication date: August 1, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Patent number: 6407814
    Abstract: A manufacturing system for a semiconductor device manages a lower pattern (100) corresponding to a pattern (200) in the semiconductor device and the rotation of the lower pattern (100) from the position of a reference axis ±0 to the position of a central axis of the pattern (100). The manufacturing system generates a stepper correction value including the rotation of the lower pattern (100) to determine the position of the pattern (200) and gives the stepper correction value to a stepper. With the stepper correction value, it is possible to prevent any shear out of specification between the upper and lower patterns. Thus, a method for correcting alignment and a method for manufacturing a semiconductor device, by which any shear is prevented, can be provided.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: June 18, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Patent number: 6372749
    Abstract: The present invention provides pyrazolo[1,5-a]pyrimidine derivatives represented by the formula (1) wherein R1 represents lower alkyl or the like; one of R2 and R3 represents hydrogen and the other represents phenyl having lower alkoxy or the like, and R4 is hydrogen, carboxyl, lower alkoxy-carbonyl or the like. The derivatives of the invention have pharmacological effects such as analgesic action, inhibitory effect on nitrogen monoxide synthetase and the like and are useful as analgesics. The derivatives of the invention are also useful as therapeutic or prophylactic agents for septicemia, endotoxin shock, chronic articular rheumatism, etc.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: April 16, 2002
    Assignee: Otsuka Pharmaceutical Factory, Inc.
    Inventors: Takashi Okumura, Yasuo Shoji, Tadao Shibutani, Tsuneo Yasuda, Takeshi Iwamoto
  • Patent number: 6338971
    Abstract: A method of correcting alignment with high alignment precision is provided. A mean value of true shears of the past (true shears for data numbers i=1 to 4) is determined. A difference (VA1) between the immediately preceding true shear (for the data number i=1) and the two-cycle previous true shear (for the data number i=2) is calculated. The product (VA2) of the true shear difference (VA1) and a constant value is calculated. Adding the product (VA2) to the mean value to determine a predicted stepper correction value (Pr1). A stepper set value is determined based on the predicted stepper correction value (Pr1).
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: January 15, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tsuneo Yasuda, Yoshikatu Tomimatu
  • Patent number: 6245779
    Abstract: The present invention provides a naphthyridine derivative represented by the formula (1) wherein A is lower alkylene; R1 is H or an electron pair “-”; R2 is optionally substituted phenyl; when R1 is an electron pair “-”, R3 is a group represented by (wherein R4 and R5 each represent lower alkyl, etc.); when R1 is H, R3 is a group —S—R6 (wherein R6 is lower alkyl, etc.); and R7 is H or lower alkyl; and also provides an analgesic composition containing the above derivative as an active ingredient.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: June 12, 2001
    Assignee: Otsuka Pharmaceutical Factory, Inc.
    Inventors: Tadao Shibutani, Yasuo Shoji, Takashi Okamura, Tsuneo Yasuda, Takeshi Iwamoto
  • Patent number: 6177330
    Abstract: A manufacturing system for a semiconductor device manages a lower pattern (100) corresponding to a pattern (200) in the semiconductor device and the rotation of the lower pattern (100) from the position of a reference axis ±0 to the position of a central axis of the pattern (100). The manufacturing system generates a stepper correction value including the rotation of the lower pattern (100) to determine the position of the pattern (200) and gives the stepper correction value to a stepper. With the stepper correction value, it is possible to prevent any shear out of specification between the upper and lower patterns. Thus, a method for correcting alignment and a method for manufacturing a semiconductor device, by which any shear is prevented, can be provided.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: January 23, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Patent number: 6166016
    Abstract: The invention provides amide derivatives which are useful as analgesics, anti-inflammatory agents, antimicrobial drugs, hypoglycemic agents, hypolipidemic agents, antihypertensive agents, anti-cancer agents, etc., the derivatives being represented by the formula ##STR1## wherein ring A represents a benzene ring, a naphthalene ring, a pyridine ring or a furan ring; R.sup.4 represents a heterocyclic group selected from the group consisting of a lower alkyl-substituted thieno[3,2-d]pyrimidin-4-yl group, an optionally substituted pyrazolo[1,5-a]-1,3,5-triazin-4-yl group, a pyrazolo[3,4-d]pyrimidin-4-yl group substituted at the 6-position and a purin-6-yl group substituted at the 2-position; and R.sup.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: December 26, 2000
    Assignee: Otsuka Pharmaceutical Factory, Inc.
    Inventors: Takashi Okamura, Yasuo Shoji, Tadao Shibutani, Tsuneo Yasuda, Takeshi Iwamoto
  • Patent number: 6092031
    Abstract: An alignment correction method which can obtain proper correction values and a semiconductor device fabricated through this alignment method are obtained. An alignment correction part (6a) calculates a stepper correction value which is set in a stepper (4a) in next alignment from trends of true shift amounts obtained from a plurality of types of processes. The true shift amount, which is the difference between stepper correction value set in the stepper and overlay check correction values detected by overlay checking devices, is actual shift amount upon alignment. The number of the true shift amounts obtained from the plurality of types of processes is larger than that of true shift amounts obtained from a single process. Thus, a trend of the true shift amounts is proper, whereby a correction value set in the stepper for the next alignment becomes proper.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: July 18, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsuneo Yasuda
  • Patent number: 5985882
    Abstract: The invention provides pyrazolo[1,5-a]pyrimidine derivatives which are useful as potent analgesics and represented by the formula ##STR1## wherein R.sup.1 is lower alkenyl, hydroxy(lower)alkyl, (lower)alkylthio(lower)alkyl, (lower)alkanoyloxy(lower)alkyl, (lower)alkoxy(lower)alkyl, furyl or thienyl, R.sup.2 is pyridyl, 1-oxide-pyridyl, lower alkyl-substituted pyrazinyl, lower alkyl-substituted pyrimidinyl, or phenyl which may have 1 to 3 substituents selected from the group consisting of lower alkyl, lower alkoxy and halogen, R.sup.3 is hydrogen or halogen, and A is a single bond or lower alkylene.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: November 16, 1999
    Assignee: Otsuka Pharmaceutical Factory, Inc.
    Inventors: Makoto Inoue, Takashi Okamura, Yasuo Shoji, Kinji Hashimoto, Masayuki Ohara, Tsuneo Yasuda
  • Patent number: 5848375
    Abstract: Center lines, i.e., precise road network information may be extracted relative to road margin information in a large-scale map based on teaching road network information (first configuration). Then, center lines, i.e., detailed road network information may be extracted relative to narrow road margin segments whose respective road plane sides have not defined yet, on the basis of road margin segments whose respective road plane sides have already been defined (second configuration). Then, finished road network information may be extracted by correcting road network information derived from the second configuration (third configuration).
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: December 8, 1998
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tadashi Nunobiki, Tsuneo Yasuda, Kaoru Wakabayashi, Koichi Ito
  • Patent number: 5848374
    Abstract: A map processing apparatus may receive information on a road network map and a housing map. A coordinate transforming section may absorb difference in reduction scale and coordinate system as much as possible between the road network map and the housing map by means of geometric transformation. A corresponding candidate detecting section may detect a plurality of corresponding candidate points as candidates of corresponding points on the other arbitrary map to the road constituent points by collating road images near respective road constituent points on the road network map with road images of corresponding location on the other arbitrary map.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: December 8, 1998
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kaoru Wakabayashi, Masahiko Iwata, Tadashi Nunobiki, Tsuneo Yasuda
  • Patent number: 5843951
    Abstract: The invention provides an analgesic composition containing as an active ingredient a specific pyrimidine derivative represented by one of the follwing formulas (1) to (3): ##STR1## wherein the substituents are as defined herein. This composition exhibits potent analgesic activity and is effective for alleviating various types of pain such as postoperative pain.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: December 1, 1998
    Assignee: Otsuka Pharmaceutical Factory Inc.
    Inventors: Makoto Inoue, Takashi Okamura, Yasuo Shoji, Kinji Hashimoto, Masayuki Ohara, Tsuneo Yasuda
  • Patent number: 5707997
    Abstract: The invention provides a pyrazolo?1,5-a!pyrimidine derivative of the following formula (1): ##STR1## wherein R.sup.1, R.sup.3, R.sup.4, R.sup.5, R.sup.6, Q, A and n are defined in the description; and R.sup.2 is naphthyl, cycloalkyl, furyl, thienyl, optionally halogen-substituted pyridyl, optionally halogen-substituted phenoxy, or phenyl which may have 1 to 3 substituents selected from the group consisting of lower alkyl, lower alkoxy, halogen, nitro, halogen-substituted lower alkyl, halogen-substituted lower alkoxy, lower alkoxycarbonyl, hydroxyl, phenyl(lower)alkoxy, amino, cyano, lower alkanoyloxy, phenyl and di(lower)alkoxyphos-phoryl(lower)alkyl. This derivative is useful as a potent analgesic.
    Type: Grant
    Filed: February 21, 1996
    Date of Patent: January 13, 1998
    Assignee: Otsuka Pharmaceutical Factory, Inc.
    Inventors: Yasuo Shoji, Makoto Inoue, Takashi Okamura, Kinji Hashimoto, Masayuki Ohara, Tsuneo Yasuda