Abstract: A logic circuit determines the power consumption of a semiconductor integrated device by taking into consideration the variation of the rate of operation. A control signal (TEST) is applied to each control signal input port (Tin) of flip-flop circuits of flip-flop circuit groups and a logic gate circuit having a plurality of input ports A and B in a combined circuit group. If the control signal (TEST) is low, both the flip-flop circuits and the logic gate circuit operate normally. However, if the control signal (TEST) is high, each of them performs the power consumption test. Regardless of the value of input signals applied to input ports D1 and D2 of the flip-flop circuits, the flip-flop circuits are controlled to have a repetitive output signal of high and low levels at ports Q1 and Q2, in synchronism with a clock signal.

Abstract: In signal transmission lines among logic circuits employed in a semiconductor integrated circuit device, a voltage driver circuit is provided with such a wiring whose length is short, and the function of the signal receiving circuit is achieved by a logic circuit capable of responding to a voltage appearing at a terminal of the wiring. On the other hand, a source terminal of such a wiring whose length is long and whose resistance is high, is voltage-driven by the voltage driver circuit in response to the output voltage of the logic circuit. A current sense circuit is provided with a terminal of this long length wiring, which senses a current flowing through this long length wiring to be converted into a voltage. Both an output resistance of the voltage driver circuit and an input resistance of the current sense circuit are made lower than a DC resistance of this long length wiring.

Abstract: An electronic device includes an integrated circuit device, the integrated circuit device comprises a first substrate including an integrated electronic semiconductor circuit and a second substrate including a cooling accelerator for accelerating a heat energy exchange between the integrated electronic semiconductor circuit and a cooling fluid, and the second substrate is joined fixedly with the first substrate through a covalent bond formed between the first substrate and the second substrate.

Abstract: In a refresh control system including a main memory having a volatile memory, at least one processing unit for accessing the main memory, a memory bus for effecting signal transfer between the main memory and the processing unit and a supervision circuit for allotting use of the memory bus in response to a request signal, the refresh control system is characterized by a refresh control circuit for transferring the request signal to the supervision circuit at the time the refresh signal is required and for commanding the initiation of the refresh operation to the main memory in response to a grant signal from the supervision circuit.